SLAAEH8 October   2024 AFE781H1 , AFE782H1 , AFE881H1 , AFE882H1 , DAC8740H , DAC8741H , DAC8742H

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 The 4-20mA Loop
    2. 1.2 The HART Protocol
      1. 1.2.1 Adding HART to the 4-20mA Loop
      2. 1.2.2 HART FSK
  5. 2AFE881H1 HART Modem
    1. 2.1 AFE881H1 HART Transmitter
    2. 2.2 Detailed Schematic
      1. 2.2.1 Input Protection
      2. 2.2.2 Startup Circuit
      3. 2.2.3 Voltage-to-Current Stage
      4. 2.2.4 Voltage-to-Current Calculation
      5. 2.2.5 HART Signal Transmission
      6. 2.2.6 HART Input Protection
      7. 2.2.7 Current Consumption
      8. 2.2.8 HART Transmitter Board
      9. 2.2.9 HART Protocol Stack
  6. 3HART Testing and Registration
    1. 3.1  HART History and the FieldComm Group
    2. 3.2  HART Testing Overview
      1. 3.2.1 HART Protocol Specifications
      2. 3.2.2 HART Protocol Test Specifications
      3. 3.2.3 Remote Transmitter Device Testing
    3. 3.3  HART Test Equipment
    4. 3.4  HART Physical Layer Testing
      1. 3.4.1 FSK Sinusoid Test
      2. 3.4.2 Carrier Start and Stop Time Tests
      3. 3.4.3 Carrier Start and Stop Transient Tests
      4. 3.4.4 Output Noise During Silence
      5. 3.4.5 Analog Rate of Change Test
      6. 3.4.6 Receive Impedance Test
      7. 3.4.7 Noise Sensitivity Test
      8. 3.4.8 Carrier Detect Test
    5. 3.5  Data Link Layer Tests
      1. 3.5.1 Data Link Layer Test Specifications
      2. 3.5.2 Data Link Layer Test Logs
    6. 3.6  Universal Command Tests
    7. 3.7  Common-Practice Command Tests
    8. 3.8  Device Specific Command Tests
    9. 3.9  HART Protocol Test Submission
    10. 3.10 HART Registration
  7. 4Other TI HART Modem Designs
  8. 5Summary
  9. 6Acknowledgments
  10. 7References

2.2.4 Voltage-to-Current Calculation

The OPA333 drives control to the LOOP+ current and sets I2 to maintain the LOOP– voltage. Because of the ratio of the resistors, I2 is 1000 times larger than I1. ILOOP– equals I1 plus I2, ILOOP– is 1001 times I1.

Note that the original schematic has a large resistance in parallel with the 40.2kΩ resistor. The parallel resistance slightly reduces the current gain to 999 to 1 and ILOOP– equals VOUT / 100.

The DAC code maps directly to the current through the loop. Because the DAC has an output voltage range of 0.3V to 2.5V, the voltage is mapped to loop current of 3mA to 25mA. Because the loop current is based on the DAC voltage, the current can be set as a function of the DAC_CODE.

Equation 5. ILOOP– = VOUT / 100
Equation 6. ILOOP– = [(DAC_CODE / 216) × 2.2V + 0.3V] / 100

Table 2-1 shows different DAC code values and how the values map to the loop current in milliamps. Loop currents 3.375mA and 21.75mA are chosen as the sensor error indicator levels.

Table 2-1 DAC Code Values Converted to Voltage Output and Loop Current Setting
OUTPUT CONDITION DAC CODE DAC OUTPUT (V) LOOP CURRENT (mA)
DAC minimum 0x0000 0.3 3
Error low 0x045D 0.3375 3.375
In-range minimum 0x0BA2 0.4 4
In-range mid-scale 0x68BA 1.2 12
In-range maximum 0xC5D1 2.0 20
Error high 0xDA2E 2.175 21.75
DAC maximum 0xFFFF 2.5 25