SLAU846B June 2023 – November 2024 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G1519 , MSPM0G3105 , MSPM0G3105-Q1 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3505-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3519
The UART module contains three event publishers and no event subscribers. One event publisher (CPU_INT) manages UART interrupt requests (IRQs) to the CPU subsystem through a static event route. The second and third event publishers (DMA_TRIG_RX, DMA_TRIG_TX) are used to setup the trigger signaling for the DMA through DMA event route.
The UART events are summarized in Table 27-221.
Event | Type | Source | Destination | Route | Configuration | Functionality |
---|---|---|---|---|---|---|
CPU interrupt | Publisher | UART | CPU Subsystem | Static route | CPU_INT registers | Fixed interrupt route from UART to CPU |
DMA trigger | Publisher | UART | DMA | DMA event route | DMA_TRIG_RX registers | Fixed interrupt route from UART to DMA |
DMA trigger | Publisher | UART | DMA | DMA event route | DMA_TRIG_TX registers | Fixed interrupt route from UART to DMA |