SLAU874 October   2022 TPA3223

 

  1.   TPA3223 Evaluation Module
    1.     Trademarks
    2. 1.1 Quick Start (BTL MODE)
      1. 1.1.1 Required Hardware
      2. 1.1.2 Connections and Board Configuration (BTL MODE)
      3. 1.1.3 Power-Up
    3. 1.2 Setup By Mode
      1. 1.2.1 BTL MODE (Stereo - 2 Speaker Outputs)
      2. 1.2.2 PBTL MODE (Mono – 1 Speaker Output)
        1. 1.2.2.1 Connections and Board Configuration
        2. 1.2.2.2 Power-Up
    4. 1.3 Hardware Configuration
      1. 1.3.1 Indicator Overview (OTW_CLIP and FAULT)
      2. 1.3.2 PWM Frequency Adjust
      3. 1.3.3 Modulation Modes (AD Mode and HEAD Mode)
      4. 1.3.4 Output Mode Selection
      5. 1.3.5 Audio Front End
      6. 1.3.6 EVM Power Tree
        1. 1.3.6.1 TPA3223 Supplies
        2. 1.3.6.2 TPA3223EVM Power Options
          1. 1.3.6.2.1 PVDD Only (12 V to 45 V)
          2. 1.3.6.2.2 PVDD (12 V to 45 V) and One Non-5-V Supply
          3. 1.3.6.2.3 PVDD (12 V to 45 V) and 5-V Supply
      7. 1.3.7 LC Response and Overview
      8. 1.3.8 Reset Circuit and POR
      9. 1.3.9 Analog-Input-Board Connector (J28)
    5. 1.4 EVM Design Documents
      1. 1.4.1 TPA3223 Board Layouts
      2. 1.4.2 TPA3223 Board Layouts
      3. 1.4.3 TPA3223EVM Schematics
      4. 1.4.4 TPA3223EVM Bill of Materials
  2.   Trademarks
  3. 1Quick Start (BTL MODE)
    1. 1.1 Required Hardware
    2. 1.2 Connections and Board Configuration (BTL MODE)
    3. 1.3 Power-Up
  4. 2Setup By Mode
    1. 2.1 BTL MODE (Stereo - 2 Speaker Outputs)
    2. 2.2 PBTL MODE (Mono – 1 Speaker Output)
      1. 2.2.1 Connections and Board Configuration
      2. 2.2.2 Power-Up
  5. 3Hardware Configuration
    1. 3.1 Indicator Overview (OTW_CLIP and FAULT)
    2. 3.2 PWM Frequency Adjust
    3. 3.3 Modulation Modes (AD Mode and HEAD Mode)
    4. 3.4 Output Mode Selection
    5. 3.5 Audio Front End
    6. 3.6 EVM Power Tree
      1. 3.6.1 TPA3223 Supplies
      2. 3.6.2 TPA3223EVM Power Options
        1. 3.6.2.1 PVDD Only (12 V to 45 V)
        2. 3.6.2.2 PVDD (12 V to 45 V) and One Non-5-V Supply
        3. 3.6.2.3 PVDD (12 V to 45 V) and 5-V Supply
    7. 3.7 LC Response and Overview
    8. 3.8 Reset Circuit and POR
    9. 3.9 Analog-Input-Board Connector (J28)
  6. 4EVM Design Documents
    1. 4.1 TPA3223 Board Layouts
    2. 4.2 TPA3223 Board Layouts
    3. 4.3 TPA3223EVM Schematics
    4. 4.4 TPA3223EVM Bill of Materials

1.3.3.1 Connections and Board Configuration

Figure 2-16 illustrates the connectors and jumpers on the EVM.

GUID-20220912-SS0I-SZGC-MRZQ-B2JFGDH7GZLR-low.png Figure 2-16 EVM Board With Connectors and Jumpers

Use the following steps when connecting and configuring the board:

  1. Ensure the power supply is OFF. Connect power supply positive terminal to J1 PVDD (red) and negative terminal to J1 GND (black).
  2. Connect one speaker, power resistor load (3–8 Ω) to TPA3223EVM positive output terminal (J9 OUT1+ (red)) and other side of speaker, power resistor to TPA3223EVM negative output terminal (J9 OUT1– (black)).
  3. Use a short banana cable to connect J2 OUT2+ to J9 OUT1+ and a second short banana cable to connect J2 OUT2– to J9 OUT1–. This connection forms the parallel connection of both OUTx+ to the one side of the speaker and parallel connection of both OUTx– to the other side of the speaker.
  4. Check to make sure that the power supply is connected to J1 only and the speaker is connected to J9 or J2 only, as the colors are the same.
  5. Input Configuration:
    1. Differential Inputs: connect one differential XLR audio input to DIFF IN1 (J14). Install jumpers J10, J11, J20, and J21 to position 1:2, which is labeled as RCA or XLR. Jumpers J4 and J12 must be uninstalled for DIFF input.
    2. Single-Ended Inputs: connect one single-ended RCA audio input to IN1P (J3). Install jumpers J10, J11, J20, and J21 to position 1:2, which is labeled as RCA or XLR. Jumpers J4 and J12 must be installed for SE input.
    3. Audio Interface Board Input: Install jumpers J10, J11, J20, and J21 to position 2:3, which is labeled as AIB. Jumpers J4 and J12 must be installed for SE input from the AIB or uninstalled for DIFF input from the AIB.
  6. Ensure that RESET S1 and MUTE S2 are in the lower positions of RESET and MUTE, respectively.
  7. Check Table 2-11 for all jumper and switch configurations necessary.
Table 2-11 Jumper and Switch Configurations (PBTL Mode)
Component Component Description Configuration for PBTL
J23 Gain/CLKSYNC Select MSTR(Primary) 20 dB
J24 5V IN
J4, J12 Input DIFF/SE Select OUT = DIFF IN, IN =SE IN
J10, J11, J20, J21 AIB Input Select Position 1:2 for XLR/RCA, Position 2:3 for AIB
J6 HEAD/AD Mode Select IN
J7, J8 PBTL/BTL Select Position 2:3 for PBTL
S1 RESET Control RESET
S2 MUTE Control MUTE
J13 Auto Retry OUT
J29 PVDD-IN IN
J26 12V-IN IN
J5 5V-IN IN
J27 3.3V-IN IN
J17 OSC Output No Connection
J16 FREQ_ADJ Position 3:4 MASTER(Primary) MODE