SLLA475 December   2020 TCAN1144-Q1 , TCAN1146-Q1

 

  1. 1TCAN1144-Q1 and TCAN1146-Q1 Functional Safety Manual
  2. 2Trademarks
  3. 3Introduction
  4. 4TCAN114x-Q1 Hardware Component Functional Safety Capability
  5. 5Development Process for Management of Systematic Faults
    1. 5.1 TI New-Product Development Process
  6. 6TCAN1144-Q1 and TCAN1146-Q1 Component Overview
    1. 6.1 Targeted Applications
    2. 6.2 Hardware Component Functional Safety Concept
    3. 6.3 Functional Safety Constraints and Assumptions
  7. 7Description of Hardware Component Parts
    1. 7.1 CAN Transceiver
    2. 7.2 Digital Core
    3. 7.3 EEPROM
    4. 7.4 Power Control IP
      1. 7.4.1 Voltage Monitors
    5. 7.5 Thermal Shut Down
    6. 7.6 Digital Input/Outputs
  8. 8TCAN1144-Q1 and TCAN1146-Q1 Management of Random Faults
    1. 8.1 Fault Reporting
    2. 8.2 Functional Safety Mechanism Categories
    3. 8.3 Description of Functional Safety Mechanisms
      1. 8.3.1 CAN Communication
        1. 8.3.1.1 SM-1: CAN bus fault diagnostic
        2. 8.3.1.2 SM-2: Thermal shutdown; TSD
        3. 8.3.1.3 SM-3: CAN bus short circuit limiter, IOS
        4. 8.3.1.4 SM-4: CAN TXD pin dominant state timeout; tTXD_DTO
        5. 8.3.1.5 SM-17: CAN protocol
      2. 8.3.2 Supply Voltage Rail Monitoring
        1. 8.3.2.1 SM-5: VCC undervoltage; UVCC
        2. 8.3.2.2 SM-6: VSUP supply undervoltage; UVSUP
        3. 8.3.2.3 SM-7: VIO supply undervoltage; UVIO
      3. 8.3.3 SPI/Processor Communication
        1. 8.3.3.1 SM-8: Timout, Window or Q&A watchdog error - Normal mode
        2. 8.3.3.2 SM-9: SPI communication error; SPIERR
        3. 8.3.3.3 SM-10: Scratchpad write/read
        4. 8.3.3.4 SM-11: Sleep Wake Error Timer; tINACTIVE
      4. 8.3.4 Device Internal EEPROM
        1. 8.3.4.1 SM-12: Internal memory CRC; CRC_EEPROM
      5. 8.3.5 Floating Pins
        1. 8.3.5.1 SM-13: SCLK internal pull-up to VIO
        2. 8.3.5.2 SM-14: SDI internal pull-up to VIO
        3. 8.3.5.3 SM-15: nCS internal pull-up to VIO
        4. 8.3.5.4 SM-16: TXD internal pull-up to VIO
          1.        B Revision History

8.1 Fault Reporting

The TCAN1144-Q1 and TCAN1146-Q1 utilize interrupt registers for fault reporting. The global register is provided from the device whenever nCS is pulled low and valid clock provided on SCLK. This register provides information on where to find other interrupts.

Table 8-1 INT_GLOBAL Register Field Descriptions (Address = 50h)
BitFieldTypeResetDescription
7GLOBALERRRH0bLogical OR of all interrupts
6INT_1RH0bLogical OR of INT_1 register
5INT_2RH0bLogical OR of INT_2 register
4INT_3RH0bLogical OR of INT_3 register
3INT_CANBUSRH0bLogical OR of INT_CANBUS register
2-0RSVDR0000bReserved

Table 8-2 INT_1 Register Field Descriptions (Address = 51h)
BitFieldTypeResetDescription
7WDR/W1C0bWatchdog event interrupt.
NOTE: This interrupt bit will be set for every watchdog error event and does not reliy upon the Watchdog error counter
6CANINTR/W1C0bCAN bus wake up interrupt
5LWUR/W1C0bLocal wake up
4WKERRR/W1C0bWake error bit is set when the SWE timer has expired and the state machine has returned to Sleep mode
3FRAME_OVFR/W1C0bFrame error counter overflow
2CANSLNTR/W1C0bCAN silent
1CANTOR/W1C0bCAN timeout
0CANDOMR/W1C0bCAN bus stuck dominant
Table 8-3 INT_2 Register Field Descriptions (Address = 52h)
BitFieldTypeResetDescription
7SMSR/W1C0bSleep mode status flag. Only sets when sleep mode is entered by a WKERR, UVIO timeout or UVIO + TSD fault
6PWRONR/W1C1bPower on
5RSVDR-0b0bReserved
4UVSUPR/W1C0bVSUP undervoltage
3UVIOR/W1C0bVIO undervoltage
2UVCCR/W1C0bVCC undervoltage
1TSDR/W1C0bThermal Shutdown
0TSDWR/W1C0bThermal Shutdown Warning
Table 8-4 INT_3 Register Field Descriptions (Address = 53h)
BitFieldTypeResetDescription
7SPIERRR/W1C0bSets when SPI status bit sets
6SWERRRH0bLogical OR of (SW_EN=1 and NOT(SWCFG)) and FRAME_OVF. Selective Wake may not be enabled while SWERR is set
5FSMR/W1C0bEntered fail-safe mode. Can be cleared while in fail-safe mode.
4-1RSVDR0000bReserved
0CRC_EEPROMR/W1C0bEEPROM CRC error
Table 8-5 INT_CANBUS Register Field Descriptions (Address = 54h)
BitFieldTypeResetDescription
7RSVDR0bReserved
6CANBUSTERMOPENR/W1C0bCAN bus has one termination point open
5CANHCANLR/W1C0bCANH and CANL shorted together
4CANHBATR/W1C0bCANH shorted to Vbat
3CANLGNDR/W1C0bCANL shorted to GND
2CANBUSOPENR/W1C0bCAN bus open
1CANBUSGNDR/W1C0bCAN bus shorted to GND or CANH shorted to GND
0CANBUSBATR/W1C0bCAN bus shorted to Vbat or CANL shorted to Vbat