SLLA518 November 2020 SN6505A-Q1 , SN6505B-Q1 , SN6505D-Q1
This section provides a Failure Mode Analysis (FMA) for the pins of the SN6505x-Q1 (SOT-23 (6) package). The failure modes covered in this document include the typical pin-by-pin failure scenarios:
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Class | Failure Effects |
---|---|
A | Potential device damage that affects functionality |
B | No device damage, but loss of functionality |
C | No device damage, but performance degradation |
D | No device damage, no impact to functionality or performance |
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
External push-pull transformer connected with a winding between D1 and VCC, another winding connected between D2 and VCC.