SLLA578 June   2022 TLIN1431-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Startup
    1. 1.1 Operational Voltages
    2. 1.2 Power-Up and INIT Mode
  4. 2Pin Control
    1. 2.1 Typical Application
    2. 2.2 Power-Up into Normal Mode in Pin Control
      1. 2.2.1 Restart Mode from INIT Mode in Pin Control
      2. 2.2.2 Standby Mode from Restart Mode in Pin Control
      3. 2.2.3 Normal Mode in Pin Control
    3. 2.3 Power-Up into Fast Mode in Pin Control
    4. 2.4 Sleep Mode to Normal Mode in Pin Control
    5. 2.5 Fail-Safe Mode to Normal Mode in Pin Control
  5. 3SPI Control
    1. 3.1 Typical Application
    2. 3.2 Power-Up into Normal Mode in SPI Control
      1. 3.2.1 Restart Mode from INIT Mode in SPI Control
      2. 3.2.2 Standby Mode from Restart Mode in SPI Control
      3. 3.2.3 Normal Mode in SPI Control
    3. 3.3 Power-Up into Fast Mode in SPI Control
    4. 3.4 Sleep Mode to Normal Mode in SPI Control
    5. 3.5 Fail-Safe Mode to Normal Mode in SPI Control
    6. 3.6 Configuring Watchdog through SPI
  6. 4Pin Assignments in Pin Control vs. SPI Control
  7. 5References

1.1 Operational Voltages

The TLIN14313-Q1 (the 3.3 V LDO version of the device) operates using logic level signals of 3.3 V in both pin control and SPI control.

The TLIN14315-Q1 (the 5 V LDO version of the device), is capable of multiple operational voltages without the need for a VIO pin (also known as VIOless operation). In SPI control, the connection of the PIN/nCS pin determines whether the device operates using 3.3 V or 5 V SPI communication. As shown in Figure 1-2, leaving the PIN/nCS pin floating causes the device to operate with 3.3 V SPI, while a pull-up to VCC (5 V) results in 5 V SPI operation from the TLIN14315-Q1.

The WKRQ/INH pin can be either a logic-level digital output for wake (WKRQ) or a high-voltage inhibit output (INH) based upon its connection at startup. When externally pulled down by a 100 kΩ resistor, the pin is WKRQ and operates based upon VCC. When left floating or pulled down by a resistor of 1 MΩ or larger, the pin becomes a high-voltage INH output pin. Figure 1-3 shows these two configurations.

Figure 1-3 WKRQ/INH Pin Configurations

It is important for the designer to recognize the behavior and limits of a microprocessor connected to the TLIN1431-Q1 to ensure that necessary design constraints are met. The microprocessor should be able to handle the 5 V I/O signals of the TLIN14315-Q1 if the PIN/nCS pin is pulled up to 5 V, and the WKRQ/INH pin should be properly connected based upon its configuration as either a digital WKRQ signal or a high-voltage INH signal.