SLLA628 September   2023 THVD1424

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Use Case Domain of RS-485
    1. 1.1 RS-485 Compliant Transmitter
    2. 1.2 RS-485 Compliant Receiver
    3. 1.3 RS-485 Transceiver Use Case Variability
  5. 2Traditional RS-485 Design Process
    1. 2.1 Design Process Overview
    2. 2.2 Requirement Definition
      1. 2.2.1 Bus Voltage and Logic Voltage (VCC and VIO):
      2. 2.2.2 Number of Communication Nodes Supported plus Static vs. Dynamic Systems
      3. 2.2.3 Max Bus Length, Network Topology, Emission Concerns, and Data Rate Required
      4. 2.2.4 Duplex
      5. 2.2.5 Protection Needs
      6. 2.2.6 Additional Features of RS-485 Bus
    3. 2.3 IC Selection, Application Design, and Validation/Qualification
  6. 3One Multi-System Design: Flexible RS-485 with the THVD1424
    1. 3.1 Flexible Multi-System Design
    2. 3.2 Simplification of RS-485 Design Process Using THVD1424
      1. 3.2.1 Bus Voltage and Logic Voltage Supplies (VCC and VIO)
      2. 3.2.2 Number of Communication Nodes Supported plus Dynamic or Static Systems
      3. 3.2.3 Max Bus Length, Network Topology, Data Rate, and Emissions Concerns
      4. 3.2.4 Duplex
      5. 3.2.5 Protection Needs
      6. 3.2.6 Additional Features
  7. 4Summary
  8. 5References

2.2.4 Duplex

The next decision is that of the duplex of the device. Full duplex systems simultaneous bi-directional data communication therefore increasing their overall throughput, while half duplex systems allow bi-directional data communication a transceiver is either actively driving or in a listen mode. The trade off is that full duplex designs require 4 wires since there are two differential pairs per IC and half duplex only require 2 wires since there is only one differential pair.