SLLA641 July   2024 TAA5212 , TAC5112 , TAC5212

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2ADC Front End Block Diagram
  6. 3Application Example
    1. 3.1 MIC 1: POM-2242P-C33-R Microphone
      1. 3.1.1 Test Case 1: Microphone Minimum Input Level
      2. 3.1.2 Test Case 2: Microphone Maximum Input Level
      3. 3.1.3 Test Case 3: Microphone Maximum Input Level with Gain
    2. 3.2 MIC 2: POM-2730L-HD-R Microphone
      1. 3.2.1 Test Case 1: Microphone Minimum Input Level
      2. 3.2.2 Test Case 2: Microphone Maximum Input Level
      3. 3.2.3 Test Case 3: Microphone Maximum Input Level with Gain
  7. 4Summary
  8. 5References

Test Case 3: Microphone Maximum Input Level with Gain

In this test case, we add gain from the audio device to -1dBr of the device input full-scale. In the TAX5XXX device, the gain is set through Digital Volume (DVOL) and for ADC6120 device, the gain is set through the PGA register.

From the maximum input level of the microphone measured previously, we apply +19dB gain to bring the record audio path level to -1dBr of full-scale.

 TAA5212 Captured of Maximum Mic Input With +19dB GainFigure 3-18 TAA5212 Captured of Maximum Mic Input With +19dB Gain
 ADC6120 Captured of Maximum Mic Input With +19dB GainFigure 3-19 ADC6120 Captured of Maximum Mic Input With +19dB Gain
 ADC6120 Captured of Maximum Mic Input With +19dB Gain and DRE EnableFigure 3-20 ADC6120 Captured of Maximum Mic Input With +19dB Gain and DRE Enable

In TAX5XXX, adding the DVOL gain to the input level does not change the THDN level, but in the ADC6120 device with PGA gain it improves THDN. This increase is due to ADC noise is less dominant than the PGA thus THDN is better.

Table 3-6 MIC 2 Maximum Input Level With +19dB Gain
Analog Input Vrms [dBr(2Vrms)]Calculated THDN (dB)Measured THDN Ratio without Gain (dB)Measured THDN Ratio with Gain (dB)
TAx5xxx199mV [-20dBr]-96-95-95
ADC6120199mV [-20dBr]-91-91-97
ADC6120-DRE199mV [-20dBr]-91-91-97