SLLSED6B October   2012  – November 2017 SN65HVD82

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Receiver Failsafe
      2. 8.3.2 Low-Power Standby Mode
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Device Configuration
      2. 9.1.2 Bus - Design
      3. 9.1.3 Cable-Length Versus Data Rate
      4. 9.1.4 Stub - Length
      5. 9.1.5 3-V to 5-V Interface
      6. 9.1.6 Noise Immunity
      7. 9.1.7 Transient Protection
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Isolated Bus Node Design
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Design and Layout Considerations For Transient Protection
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Custom Design With WEBENCH® Tools
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings(1)

MIN MAX UNIT
VCC Supply voltage –0.5 7 V
Voltage range at A or B Inputs –18 18 V
Input voltage range at any logic pin –0.3 5.7 V
Voltage input range, transient pulse, A and B, through 100Ω –100 100 V
Receiver output current –24 24 mA
TJ Junction temperature 170 °C
Continuous total power dissipation See Thermal Information
TSTG Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
Machine model (MM), JEDEC Standard 22 ±400
IEC 61000-4-2 ESD (Contact Discharge) Bus terminals and GND ±12000
IEC 60749-26 ESD (Human Body Model) Bus terminals and GND ±16000
IEC 61000-4-4 EMC (Fast Transient Burst Immunity) Bus terminals and GND ±4000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VCC Supply voltage 4.5 5 5.5 V
VI Input voltage at any bus terminal (separately or common mode)(1) –7 12 V
VIH High-level input voltage (D, DE and RE inputs) 2 VCC V
VIL Low-level input voltage (D, DE and RE inputs) 0 0.8 V
VID Differential input voltage (A and B inputs) –12 12 V
IO Output current, Driver –60 60 mA
Output current, Receiver –8 8 mA
RL Differential load resistance 54 60 Ω
CL Differential load capacitance 50 pF
1/tUI Signaling rate 250 kbps
TA Operating free-air temperature (see Application and Implementation section for thermal information) –40 85 °C
TJ Junction Temperature –40 150 °C
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.

6.4 Thermal Information

THERMAL METRIC(1) SN65HVD82 UNIT
D (SOIC)
8 PINS
RθJA Junction-to-ambient thermal resistance 116.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 60.8 °C/W
RθJB Junction-to-board thermal resistance 57.1 °C/W
ψJT Junction-to-top characterization parameter 13.9 °C/W
ψJB Junction-to-board characterization parameter 56.5 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|VOD| Driver differential output voltage magnitude See Figure 5, RL = 60 Ω, 375 Ω on each output to –7 V to 12 V 1.5 V
RL = 54 Ω (RS-485) See Figure 6 1.5 2 V
RL = 100 Ω (RS-422) 2 2.5 V
Δ|VOD| Change in magnitude of driver differential output voltage RL = 54 Ω, CL = 50 pF See Figure 6 –0.2 0 0.2 V
VOC(SS) Steady-state common-mode output voltage Center of two 27-Ω load resistors See Figure 6 1 VCC/2 3 V
ΔVOC Change in differential driver output common-mode voltage –0.2 0 0.2 V
VOC(PP) Peak-to-peak driver common-mode output voltage 850 mV
COD Differential output capacitance 8 pF
VIT+ Positive-going receiver differential input voltage threshold See (1) –70 -20 mV
VIT– Negative-going receiver differential input voltage threshold –200 –150 See (1) mV
VHYS Receiver differential input voltage threshold hysteresis (VIT+ – VIT–) 40 60 mV
VOH Receiver high-level output voltage IOH = -8 mA 4 VCC–0.3 V
VOL Receiver low-level output voltage IOL = 8 mA 0.2 0.4 V
II Driver input, driver enable, and receiver enable input current –2 2 μA
IOZ Receiver output high-impedance current VO = 0 V or VCC, RE at VCC –10 10 µA
IOS Driver short-circuit output current | IOS | with VA or VB from –7 V to +12 V 150 mA
II Bus input current (disabled driver) VCC = 4.5 to 5.5 V or VCC = 0 V,
DE at 0 V		 VI = 12 V 75 125 μA
VI = –7 V –100 –40
ICC Supply current (quiescent) Driver and Receiver enabled DE = VCC, RE=GND,
No load		 900 μA
Driver enabled, receiver disabled DE = VCC, RE = VCC,
No load		 650
Driver disabled, receiver enabled DE = GND, RE = GND,
No load		 650
Driver and receiver disabled DE = GND, D=GND,
RE = VCC, No load		 0.4 2
Supply current (dynamic) See Typical Characteristics
(1) Under any specific conditions, VIT+ is assured to be at least VHYS higher than VIT-.

6.6 Switching Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DRIVER
tr, tf Driver differential output rise/fall time RL = 54 Ω, CL = 50 pF, See Figure 7 400 700 1200 ns
tPHL, tPLH Driver propagation delay 90 700 1000 ns
tSK(P) Driver pulse skew, |tPHL – tPLH| 25 200 ns
tPHZ, tPLZ Driver disable time See Figure 8 and Figure 9 50 500 ns
tPZH, tPZL Driver enable time Receiver enabled 500 1000 ns
Receiver disabled 3 9 μs
RECEIVER
tr, tf Receiver output rise/fall time CL = 15 pF, See Figure 10 18 30 ns
tPHL, tPLH Receiver propagation delay time 85 195 ns
tSK(P) Receiver pulse skew, |tPHL – tPLH| 1 15 ns
tPLZ, tPHZ Receiver disable time 50 500 ns
tPZL(1), tPZH(1)
tPZL(2), tPZH(2)		 Receiver enable time Driver enabled, See Figure 11 20 130 ns
Driver disabled, See Figure 12 2 8 μs

6.7 Typical Characteristics

SN65HVD82 C003_SLLSED6.gif Figure 1. Driver Output Voltage vs Driver Output Current
SN65HVD82 C001_SLLSED6.gif Figure 3. Supply Current vs Signaling Rate
SN65HVD82 C002_SLLSED6.gif Figure 2. Driver Rise and Fall Time vs Temperature
SN65HVD82 C004_SLLSED6.gif Figure 4. Receiver Output vs Differential Input Voltage