SLLU326A May   2022  – June 2022 TLIN1431-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Features
    2. 1.2 Description
  4. 2EVM Setup and Features
    1. 2.1  Startup Mode Configurations
      1. 2.1.1 Pin and SPI Modes
      2. 2.1.2 Wake Request (WKRQ) vs. Inhibit Output (INH)
    2. 2.2  Commander and Responder Configurations
    3. 2.3  Local Wake-Up
    4. 2.4  Channel Expansion
    5. 2.5  VBAT Voltage Divider
    6. 2.6  Reset Input
    7. 2.7  Logic-Level LIMP and WAKE Signals
    8. 2.8  High-Voltage Signal Monitoring
    9. 2.9  TXD and RXD
    10. 2.10 VCC Load Testing
    11. 2.11 SPI Interface
  5. 3Jumpers, Headers, Connectors, Test Points, and Switches
  6. 4Bill of Materials
  7. 5Schematic

Jumpers, Headers, Connectors, Test Points, and Switches

Table 3-1, Table 3-2, and Table 3-3 list all the jumpers, headers, connectors, test points, and switches on the TLIN1431EVM and explain the functions of each of these components.

Table 3-1 Jumpers, Headers, and Connectors
Designator Function

J1

Connector for WDT/CLK, with adjacent VCC and GND pins for WDT triggering, or GND referencing for CLK function.

J2

Connector for WKRQ/INH as described in Section 2.1.2.

J3

Connector for EN/nINT, with adjacent pull-up to VCC and GND pins for interfacing the enable/interrupt pin.

J4

Generic output connector with multiple board signals connected. Pins 4-7, which are SPI communication pins in SPI mode, are separated column-wise from the other signals on J4. The non-signal pins are connected to GND.

J5

Connector for PIN/nCS, which is used to configure the startup mode of the TLIN1431-Q1 as described in Section 2.1.1 and operates as chip-select in SPI mode.

J6 & J7

Channel expansion output as described in Section 2.4.

J8

TXD and RXD connection as described in Section 2.9.

J9

Terminal block connector for LIMP.

J10

Commander node selector, as described in Section 2.2.

J11

Banana jack connector for the VBAT and GND supplies for the device.

J13

Connector for VBAT and VSUP.

J14 & J15

Configuration connectors for pull-up on WAKE pin, as described in Section 2.3.

J16

LIN output with adjacent VBAT and GND pins.

J17

RXD pull-up selector, as described in Section 2.9.

J18

Pull-down connector for LIMP. Connect a shunt to apply a 100 kΩ pull-down on the LIMP pin.

J21

GND connection rail.

Table 3-2 Test Points
Designator Function

TP1

Test point for WAKE (HV)

TP2

Test point for LIMP (HV)

TP3

Test point for VSUP (HV)

TP4

Test point for VCC

TP5

Test point for VBAT (HV)

TP6-TP14

GND connections

TP15

Test point for WKRQ/INH (HV possible)

TP16

Test point for HSS (HV)

TP17

Test point for nRST

TP19

Test point for nWDR/SDO

TP20

Test point for PV

TP22

Test point for WDT/CLK

TP23

Test point for PIN/nCS

TP24

Test point for TXD

TP25

Test point for RXD

Table 3-3 Switches
Designator Function

S1

Push-button switch for WAKE interfacing, only active if J14 and J15 are appropriately connected as described in Section 2.3.

S2

Push-button switch for applying a strong pull-down to nRST as described in Section 2.6.