SLPU009 February   2022 JFE150

 

  1.   Trademarks
  2. 1Overview
    1. 1.1 JFE150
    2. 1.2 JFE150EVM
    3. 1.3 Related Documentation
    4. 1.4 Evaluation Module Limitations and Cautions
    5. 1.5 Electrostatic Discharge Caution
  3. 2Getting Started
    1. 2.1 Power Supplies
    2. 2.2 Input
    3. 2.3 Vbias
    4. 2.4 Output
    5. 2.5 Capacitors
  4. 3Application Circuit
    1. 3.1 JFE150 Ultra-Low-Noise Pre-Amp
  5. 4Schematic, PCB Layout, and Bill of Materials
    1. 4.1 JFE150EVM Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials

2.3 Vbias

The section labeled Vbias in Figure 4-1 consists of a simple voltage divider. The default voltage divider configuration is used to set the Vbias node to midsupply on a single supply voltage. Operating the EVM on a single supply voltage of VDD = 12 V and VSS = GND results in Vbias ≅ 6 V. Vbias sets the common-mode voltage of the OPA202 resulting in a dc voltage of approximately 6 V seen at the Vout of the EVM. Monitor Vbias by using the test point labeled Vbias. When using the EVM in a dual-supply configuration, set the Vbias point to midsupply by removing resistor R16 and replacing R17 with a 0-Ω resistor.