SLUAAL6 august   2023 TPS51383 , TPS51386

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Suggested Point-of-Load Designs
  5. 2Light Load Efficiency and Low Quiescent Current with TPS51383
  6. 3Voltage Identification Capability with TPS51215A
  7. 4Fast Load Transient Response with D-CAP3 and D-CAP2 Control
  8. 5Small IC Packaging
  9. 6Summary
  10. 7References

5 Small IC Packaging

Integrated circuit packaging technology must keep pace with semiconductor wafer fabrication as process technology advances. TI released flip-chip on leadframe packaging that reduce package footprint, power loss, and parasitic effects. Traditional bond wires are replaced with copper posts attached directly to the leadframe which shortens current path from the IC to the lead frame, which allows a larger die in the small package cavity, reduced package resistance, and reduced parasitic package inductance loops. Consider the 8-A TPS51383, housed in a small 2x3mm QFN package.

Figure 5-1 shows ample pins for power conversion and I/O features while maintaining a 0.5mm pin pitch, allowing simplified circuit board manufacturing.

GUID-20220902-SS0I-KDGZ-CCLF-3W6C8SBFSVRF-low.svg Figure 5-1 TPS51383 in 2x3mm QFN Package