SLUSAS9B NOVEMBER   2013  – December 2014 TPS53915

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
    7. 6.7 Thermal Performance
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1  Powergood
      2. 7.3.2  D-CAP3 Control and Mode Selection
      3. 7.3.3  D-CAP3 Mode
      4. 7.3.4  Sample and Hold Circuitry
      5. 7.3.5  Adaptive Zero-Crossing
      6. 7.3.6  Forced Continuous-Conduction Mode
      7. 7.3.7  Current Sense and Overcurrent Protection
      8. 7.3.8  Overvoltage and Undervoltage Protection
      9. 7.3.9  Out-Of-Bounds Operation (OOB)
      10. 7.3.10 UVLO Protection
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto-Skip Eco-Mode Light-Load Operation
      2. 7.4.2 Forced Continuous-Conduction Mode
    5. 7.5 Programming
      1. 7.5.1  The PMBus General Descriptions
      2. 7.5.2  PMBus Slave Address Selection
      3. 7.5.3  PMBus Address Selection
      4. 7.5.4  Supported Formats
        1. 7.5.4.1 Direct Format: Write
        2. 7.5.4.2 Combined Format: Read
        3. 7.5.4.3 Stop-Separated Reads
      5. 7.5.5  Supported PMBus Commands
        1. 7.5.5.1 Unsupported PMBus Commands
        2. 7.5.5.2 OPERATION [01h] (R/W Byte)
        3. 7.5.5.3 ON_OFF_CONFIG [02h] (R/W Byte)
        4. 7.5.5.4 WRITE_PROTECT [10h] (R/W Byte)
      6. 7.5.6  CLEAR_FAULTS [03h] (Send Byte)
      7. 7.5.7  STORE_DEFAULT_ALL [11h] (Send Byte)
      8. 7.5.8  RESTORE_DEFAULT_ALL [12h] (Send Byte)
      9. 7.5.9  STATUS_WORD [79h] (Read Word)
      10. 7.5.10 CUSTOM_REG (MFR_SPECIFIC_00) [D0h] (R/W Byte)
      11. 7.5.11 DELAY_CONTROL (MFR_SPECIFIC_01) [D1h] (R/W Byte)
      12. 7.5.12 MODE_SOFT_START_CONFIG (MFR_SPECIFIC_02) [D2h] (R/W Byte)
      13. 7.5.13 FREQUENCY_CONFIG (MFR_SPECIFIC_03) [D3h] (R/W Byte)
      14. 7.5.14 VOUT_ADJUSTMENT (MFR_SPECIFIC_04) [D4h] (R/W Byte)
      15. 7.5.15 Output Voltage Fine Adjustment Soft Slew Rate
      16. 7.5.16 VOUT_MARGIN (MFR_SPECIFIC_05) [D5h] (R/W Byte)
      17. 7.5.17 Output Voltage Margin Adjustment Soft-Slew Rate
      18. 7.5.18 UVLO_THRESHOLD (MFR_SPECIFIC_06) [D6h]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Choose the Switching Frequency
        2. 8.2.2.2 Choose the Operation Mode
        3. 8.2.2.3 Choose the Inductor
        4. 8.2.2.4 Choose the Output Capacitor
        5. 8.2.2.5 Determine the Value of R1 and R2
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

9 Power Supply Recommendations

This device is designed to operate from an input voltage supply between 1.5-V and 18-V (4.5-V and 25-V biased) Input. use only a well regulated supply. These devices are not designed for split-rail operation. The VIN and VDD terminals must be the same potential for accurate high-side short circuit protection. Proper bypassing of input supplies and internal regulators is also critical for noise performance, as is PCB layout and grounding scheme. See the recommendations in the Layout section.