SLUUCE9A December   2020  – April 2021 TPS543820 , TPS543820E

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Before You Begin
    3. 1.3 Performance Characteristics Summary
  3. 2Configurations and Modifications
    1. 2.1 Output Voltage
    2. 2.2 Switching Frequency (FSEL Pin)
    3. 2.3 Current Limit, Soft-Start Time, and Internal Compensation (MODE Pin)
    4. 2.4 Adjustable UVLO
  4. 3Test Setup and Results
    1. 3.1  Input/Output Connections
    2. 3.2  Efficiency
    3. 3.3  Output Voltage Regulation
    4. 3.4  Load Transient and Loop Response
    5. 3.5  Output Voltage Ripple
    6. 3.6  Input Voltage Ripple
    7. 3.7  Synchronizing to a Clock
    8. 3.8  Start-up and Shutdown with EN
    9. 3.9  Start-up and Shutdown with VIN
    10. 3.10 Start-up Into Pre-Bias
    11. 3.11 Hiccup Current Limit
    12. 3.12 Overvoltage Protection
    13. 3.13 Thermal Performance
  5. 4Board Layout
    1. 4.1 Layout
  6. 5Schematic and Bill of Materials
    1. 5.1 Schematic
    2. 5.2 Bill of Materials
  7. 6Revision History

3.10 Start-up Into Pre-Bias

Figure 3-32 shows the EN start-up of U2 into a pre-biased output. The output voltage is pre-biased by toggling the EN pin low then high at a rate such that the output voltage does not fully discharge before EN goes high again.

GUID-7B1E724F-1FE5-4320-BEC4-2A7B04E096A0-low.gifFigure 3-32 U2 Start-up Into 0.5-V Pre-Bias