SLUUCE9A December 2020 – April 2021 TPS543820 , TPS543820E
Figure 3-24 shows U1 and U2 synchronized to an external clock of 1.25 MHz at the SYNC test point. To synchronize to the clock at the SYNC test point, place a shunt on the ENSYNC_U1 or ENSYNC_U2 jumper or jumpers to enable the output of the buffers.
Figure 3-25 shows the transitions to and from synchronizing to an external clock with 6-A load. 16 pulses with a frequency of 1-MHz were sent to the SYNC testpoint on the EVM. In this waveform, after four pulses, the TPS543820 begins synchronizing to the clock. After the clock goes away, the TPS543820 switches at 70% of the internal clock frequency for four pulses then transitions back to the normal internal clock frequency. There is only a small variation in the output voltage during these transitions.