SLUUCZ3 July   2024 TPS546E25

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Test Setup
      1. 2.1.1 Test and Configuration Software
        1. 2.1.1.1 Description
        2. 2.1.1.2 Features
      2. 2.1.2 Test Equipment
        1. 2.1.2.1 Voltage Source
        2. 2.1.2.2 Multimeters
        3. 2.1.2.3 Output Load
        4. 2.1.2.4 Oscilloscope
        5. 2.1.2.5 Fan
        6. 2.1.2.6 USB-to-GPIO Interface Adapter:
        7. 2.1.2.7 Recommended Wire Gauge
      3. 2.1.3 Tip and Barrel Measurement
      4. 2.1.4 List of Test Points, Jumpers, and Connectors
      5. 2.1.5 Configuring EVM to Overdrive VDRV
    2. 2.2 Best Practices
  9. 3Software
    1. 3.1 EVM Configuration Using the Fusion GUI
      1. 3.1.1 Configuration Procedure
    2. 3.2 Using the Fusion GUI
      1. 3.2.1 Opening the Fusion GUI
      2. 3.2.2 Changing ON_OFF_CONFIG
      3. 3.2.3 SMBALERT# Mask
      4. 3.2.4 All Config
      5. 3.2.5 Pin Strapping
      6. 3.2.6 Monitor
      7. 3.2.7 Status
  10. 4Implementation Results
    1. 4.1 Test Procedure
      1. 4.1.1 Line and Load Regulation and Efficiency Measurement Procedure
      2. 4.1.2 Efficiency Measurement Test Points
      3. 4.1.3 Control Loop Gain and Phase Measurement Procedure
    2. 4.2 Performance Data and Typical Characteristic Curves
      1. 4.2.1 Efficiency
      2. 4.2.2 Transient Response
      3. 4.2.3 Control Loop Bode Plot
      4. 4.2.4 Output Ripple
      5. 4.2.5 Control On
      6. 4.2.6 Control Off
      7. 4.2.7 Control On With Prebiased Output
      8. 4.2.8 Thermal Image
  11. 5Hardware Design Files
    1. 5.1 Schematic
    2. 5.2 EVM Assembly Drawing and PCB Layout
    3. 5.3 Bill of Materials
  12. 6Additional Information
    1.     Trademarks

Device Information

The TPS546E25 device is a highly integrated buck with D-CAP4 control topology for fast transient response. The PMBus interface configures all programmable parameters and stores them in the non-volatile memory (NVM ) as the new default values to minimize the external component count. Pinstrap options allow for configuration as primary or secondary, stack position and stack number, DCM (single phase only) or FCCM, overcurrent limit, fault response, internal or external feedback resistor, output voltage selection or range, switching frequency, and compensation.

The PMBus interface with a 1MHz clock support gives a convenient, standardized digital interface for configuration, as well as telemetry of key parameters including output voltage, output current, and internal die temperature. Response to fault conditions is set to restart, latch off, or ignore, depending on system requirements. Two, three, or four TPS546E25 devices can be interconnected to provide up to 200A on a single output.

One device option is to overdrive the internal 5V LDO with an external 5V supply through the VDRV and VCC pins to improve efficiency, reduce power dissipation, and enable start-up with a lower input voltage. The TPS546E25 is a lead-free device and is Restriction of Hazardous Substances (RoHS) compliant without exemption.