SLVAFI8 February   2023 TLC6C5748-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Design Considerations for Low EMI
    1. 2.1 Design Considerations Overview
    2. 2.2 Considerations in Detail
      1. 2.2.1 Top-Level Architecture
      2. 2.2.2 High Frequency Signals
        1. 2.2.2.1  Original Setup
        2. 2.2.2.2  3.3 V I/O Voltage Instead of 5 V
        3. 2.2.2.3  Use Independent OSC for GSCLK With Spread Spectrum
        4. 2.2.2.4  Without Using Buffer on GSCLK
        5. 2.2.2.5  Using Snubber on GSCLK
        6. 2.2.2.6  Lower the Signal Frequency
        7. 2.2.2.7  Placement and PCB layout
        8. 2.2.2.8  ESD Enhancement
        9. 2.2.2.9  Demo and Test Results
        10. 2.2.2.10 Bench Test Results
  5. 3Summary
  6. 4References

2.1 Design Considerations Overview

As the general approach of dealing with EMC problems, the noise source and coupling path (or antenna for radiated emission) need to be identified first.

In a local dimming system, the noise mainly comes from four sources:

  1. The clock and data signals in the interface. TLC6C5748-Q1 supports up to 25-MHz SCLK/SIN/SOUT frequency, and up to 33MHz GSCLK frequency. These pulses contain high order harmonics that need to be handled carefully.
  2. The switching noise from dc/dc converters and the PWM dimming. This kind of noise has relatively lower range frequency spectrum but higher energy.
  3. The LED PWM dimming frequency. Compare to previous two sources, this frequency is around kHz level. The calculation formula of the frequency about TLC6C5748-Q1 is shown in Equation 1
  4. The impedance of the board interconnections, such as the parasitic inductance of the connector metal contacts, can result in a high frequency AC voltage source when the signal current pass through
Equation 1. fLED=GSCLK216

In many local dimming designs, the LED board is large size two-layer PCB. The routing on LED board can be quite complex and not able to maintain a good “return path” for the traces carrying high frequency signals. This results in an enlarged high di/dt loop area, which contributes to the radiated emission. The long traces carrying high frequency signals can also be equivalent antenna.

The low EMI design considerations for TLC6C5748-Q1 are summarized in #GUID-3F0DF16E-172E-45A2-929E-19C88F40F2BB/TABLE_C3H_KHL_FWB.

Table 2-1 Low EMI Design Considerations for TLC6C5748-Q1
Item Methods Purpose
Top-level architecture Shield cable or connector; minimized PCB numbers; minimize cable length. Reduce high frequency noise and antenna
High-frequency signals Use 3.3V I/O voltage. Decrease or attenuate high frequency energy
Select just enough interface frequency to reduce harmonic energy in high frequency range.

Decrease the driving strength of the data and clock signals;

Add R-C filter or ferrite beads to smooth the rising/falling edge.
Spread spectrum Suppress the peak in spectrum
Optimization on GSCLK Decrease or attenuate high frequency energy
PCB layout Provide low impedance return path for high frequency signals; place vias along the high frequency signal routing, etc. Reduce high frequency noise and antenna