SLVAFI8 February   2023 TLC6C5748-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Design Considerations for Low EMI
    1. 2.1 Design Considerations Overview
    2. 2.2 Considerations in Detail
      1. 2.2.1 Top-Level Architecture
      2. 2.2.2 High Frequency Signals
        1. 2.2.2.1  Original Setup
        2. 2.2.2.2  3.3 V I/O Voltage Instead of 5 V
        3. 2.2.2.3  Use Independent OSC for GSCLK With Spread Spectrum
        4. 2.2.2.4  Without Using Buffer on GSCLK
        5. 2.2.2.5  Using Snubber on GSCLK
        6. 2.2.2.6  Lower the Signal Frequency
        7. 2.2.2.7  Placement and PCB layout
        8. 2.2.2.8  ESD Enhancement
        9. 2.2.2.9  Demo and Test Results
        10. 2.2.2.10 Bench Test Results
  5. 3Summary
  6. 4References

2.2.2.8 ESD Enhancement

System level ESD is another critical topic in EMC specification. The possible paths affect the LED commonly from three paths, LED voltage, LED driver Vcc voltage and GND. To select appropriate ESD place on LED voltage rail and LED driver Vcc voltage rail is the good way to pass the system-level ESD. For LED voltage rail, the suggestion is TPD1E10B09-Q1 (9V, VBR) and for LED driver Vcc (3.5V, VBR), the suggestion is TPD1E01B04-Q1. For more detailed information, please see the reference board circuit.