SLVAFJ1 February 2023 TPS2121
Once input settles to steady state, TPS2121 utilizes a fast switchover to minimize output voltage dip. However, in VCOMP configuration, TPS2121 does not support fast switchover since CP2 > VREF is the required condition. So normal switchover time is 100 µs. The amount of voltage drop on the output is dependent on the output load current (IOUT), and the load capacitance (COUT). The minimum output voltage (VOUT,MIN) during switchover can be found using the following equations:
VDIP occurs after the device recognizes the voltage on IN1 crosses the switchover thresholds described in #GUID-69298682-FB58-45F4-9DF1-626CD99E85B0. The maximum output dip (VDIP) and output load current(IOUT) are dependent on system specifications, as shown below. These values can be predetermined and adjusted by varying the load capacitance of the system. For this design example, calculations are shown in #GUID-DBF2B11E-923A-4CB7-8220-0498BA3317F8. Therefore, the output of this design example drops additional 31.25 mV during switching between two inputs.
Nominal VDIP Calculation
If switching from a lower to a higher voltage, the selected channel does not detect reverse voltage and shall turn on immediately using the current monitor to limit the output current to a safe level.
If an input is selected while the output voltage is still a higher voltage, then that channel continues to block reverse current by waiting to turn on until the output drops below the VRCB threshold.