SLVSEZ5A July   2020  – December 2020 TPS25814

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Recommended Capacitance
    5. 6.5  Thermal Information
    6. 6.6  Power Supply Characteristics
    7. 6.7  Power Consumption
    8. 6.8  PP_5V Power Switch Characteristics
    9. 6.9  Power Path Supervisory
    10. 6.10 CC Cable Detection Parameters
    11. 6.11 CC VCONN Parameters
    12. 6.12 Thermal Shutdown Characteristics
    13. 6.13 Input/Output (I/O) Characteristics
    14. 6.14 BC1.2 Characteristics
    15. 6.15 I2C Requirements and Characteristics
    16. 6.16 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Paths
        1. 8.3.1.1 Internal Sourcing Power Paths
          1. 8.3.1.1.1 PP_5V Current Clamping
          2. 8.3.1.1.2 PP_5V Local Overtemperature Shut Down (OTSD)
          3. 8.3.1.1.3 PP_5V OVP
          4. 8.3.1.1.4 PP_5V UVLO
          5. 8.3.1.1.5 PP_5Vx Reverse Current Protection
          6. 8.3.1.1.6 PP_CABLE Current Clamp
          7. 8.3.1.1.7 PP_CABLE Local Overtemperature Shut Down (OTSD)
          8. 8.3.1.1.8 PP_CABLE UVLO
      2. 8.3.2 Cable Plug and Orientation Detection
        1. 8.3.2.1 Configured as a Source
      3. 8.3.3 Overvoltage Protection (CC1, CC2)
      4. 8.3.4 Default Behavior Configuration (ADCIN1, ADCIN2)
      5. 8.3.5 BC 1.2 (USB_P, USB_N)
      6. 8.3.6 Digital Interfaces
        1. 8.3.6.1 Fault Indicators ( FAULT )
        2. 8.3.6.2 Sink Attachment Indicator ( SINK )
        3. 8.3.6.3 Polarity Indicator ( POL )
        4. 8.3.6.4 Power Management ( CHG_HI)
        5. 8.3.6.5 Battery Charging Control (CTL)
        6. 8.3.6.6 Debug Accessory Detection ( DEBUG)
        7. 8.3.6.7 Disable the Port (EN)
        8. 8.3.6.8 I2C Interface
      7. 8.3.7 I2C Interface
        1. 8.3.7.1 I2C Interface Description
        2. 8.3.7.2 I2C Clock Stretching
        3. 8.3.7.3 I2C Address Setting
        4. 8.3.7.4 Unique Address Interface
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pin Strapping to Configure Default Behavior
      2. 8.4.2 Power States
      3. 8.4.3 Schottky for Current Surge Protection
      4. 8.4.4 Thermal Shutdown
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Type C DFP Port Implementation with Embedded Controller
        1. 9.2.1.1 Detailed Design Procedure
          1. 9.2.1.1.1 Type-C Connector VBUS Capacitors
          2. 9.2.1.1.2 VBUS Schottky and TVS Diodes
          3. 9.2.1.1.3 VBUS Snubber Circuit
        2. 9.2.1.2 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 3.3-V Power
      1. 10.1.1 VIN_3V3 Input Switch
    2. 10.2 1.5-V Power
    3. 10.3 Recommended Supply Load Capacitance
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Top TPS25814 Placement and Bottom Component Placement and Layout
    2. 11.2 Layout Example
    3. 11.3 Component Placement
    4. 11.4 Routing and View Placement
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

6.8 PP_5V Power Switch Characteristics

Operating under these conditions unless otherwise noted: 3.0 V ≤ VVIN_3V3 ≤ 3.6V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RPP_5V Resistance from PP5V to VBUS ILOAD = 3 A, TJ=25oC 36 38 mΩ
RPP_5V Resistance from PP5V to VBUS ILOAD = 3 A, TJ=125oC 36 53 mΩ
IPP5V_REV VBUS to PP5V leakage current VPP5V = 0V, VVBUS = 5.5V, PP_5V disabled, TJ≤85oC, measure IPP5V 5 µA
IPP5V_FWD PP5V to VBUS leakage current VPP5V = 5.5V, VVBUS = 0V, PP_5V disabled, TJ≤85oC, measure IVBUS 15 µA
ILIM5V Current limit setting 1.5A setting 2.3 2.70 A
ILIM5V Current limit setting 3.0A setting 3.22 3.78 A
IVBUS PP5V to VBUS current sense accuracy 3.64A ≥ IVBUS ≥ 1A 3.05 3.5 3.75 A/V
VPP_5V_RCP RCP clears and PP_5V starts turning on when VVBUS – VPP5V < VPP_5V_RCP. Measure VVBUS – VPP5V 10 20 mV
tiOS_PP_5V response time to VBUS short circuit VBUS to GND through 10mΩ, CVBUS=0 1.15 µs
tPP_5V_ovp response time to VVBUS > VOVP4RCP Enable PP_5V, IRpDef being drawn from PP5V, configure VOVP4RCP to setting 2, ramp VVBUS from 4V to 20V at 100 V/ms, CPP5V = 2.5 µF, measure time from OVP detection until reverse current < 100 mA 4.5 µs
tPP_5V_uvlo response time to VPP5V < VPP5V_UVLO, PP_VBUS is deemed off when VVBUS < 0.8V RL = 100 Ω, no external capacitance on VBUS 4 µs
tPP_5V_rcp response time to VPP5V < VVBUS+VPP_5V_RCP VPP5V=5.5V, IRpDef being drawn from PP5V, enable PP_5V, configure VOVP4RCP to setting 2, ramp VVBUS from 4V to 21.5V at 10 V/µs, measure VPP5V. CPP5V = 104 µF, CVBUS=10µF, measure time from RCP detection until reverse current < 100 mA. 0.7 µs
tILIM Current limit deglitch time 5.1 ms
tON from enable signal to VBUS at 90% of final value RL = 100Ω, VPP5V = 5V, CL=0 2.3 3.3 4.3 ms
tOFF from disable signal to VBUS at 10% of final value RL = 100Ω, VPP5V = 5V, CL=0 0.30 0.45 0.6 ms
tRISE VBUS from 10% to 90% of final value   RL = 100Ω, VPP5V = 5V, CL=0 1.2 1.7 2.2 ms
tFALL VBUS from 90% to 10% of initial value RL = 100Ω, VPP5V = 5V, CL=0 0.06 0.1 0.14 ms