SLVU957A September   2019  – November 2021 BQ76922

 

  1.   Trademarks
  2. 1Features
    1. 1.1 Kit Contents
    2. 1.2 Ordering Information
    3. 1.3 BQ76922EVM Circuit Module Performance Specification Summary
    4. 1.4 Required Equipment
  3. 2BQ76922EVM Quick Start Guide
    1. 2.1 Before You Begin
    2. 2.2 Quick Start
  4. 3Interface Adapter
  5. 4Battery Management Studio Software
    1. 4.1 System Requirements
    2. 4.2 Installing BQStudio
    3. 4.3 BQ76922 bqz File Installation
    4. 4.4 BQStudio Operation and Registers View
    5. 4.5 Commands
    6. 4.6 Data Memory
      1. 4.6.1 Entering, Saving, and Loading Configuration
      2. 4.6.2 OTP Programming
    7. 4.7 Calibration
    8. 4.8 Command Sequences
  6. 5BQ76922EVM Circuit Module Use
    1. 5.1 Cell Simulator
    2. 5.2 Evaluating with Load Current
    3. 5.3 Evaluating Charge and Discharge Currents
    4. 5.4 Evaluating with Simulated Current
    5. 5.5 Reducing the Cell Count
    6. 5.6 Connecting Cells
    7. 5.7 Connecting to a Host
    8. 5.8 Hardware Configuration
      1. 5.8.1 Configuration Jumpers
      2. 5.8.2 Unused Components
    9. 5.9 Configuration Register Programming
  7. 6BQ76922EVM Circuit Module Physical Construction
    1. 6.1 Board Layout
    2. 6.2 Bill of Materials
    3. 6.3 REACH Compliance
    4. 6.4 Schematic
  8. 7Related Documents from Texas Instruments
  9. 8Revision History

5.8.1 Configuration Jumpers

Certain features on the BQ76922EVM may be configured by jumpers or shunts on headers. See Section 6.4 for details of the header pins. Not all configurations are compatible with all register settings, the user should set pins appropriately for the register settings planned. For example pins must not be pulled above REG18 when used as thermistor inputs. Pull up to REG1 is not acceptable when registers configure a pin as a thermistor input.

CAUTION:

Multi-function pins must be connected to compatible signal levels before programming registers to avoid device damage.

The J16 cell simulator header and J7 I2C configuration are discussed with board connection diagrams.

J4 selects the connection of the DFETOFF and CFETOFF pins. Pins may be pulled low, high to REG1 or brought to a terminal block for external connection.

J3 selects the connection of TS2. It may be taken to a terminal block for connection of an external wake or thermistor. It may also be pulled to VSS. The 10k R22 simulates a nominal temperature.

J6 selects the connection of ALERT. It may be connected to a terminal block for external connection, to the on-board interface for HDQ, or pulled up to REG1 or down to VSS.