SLVU957A September 2019 – November 2021 BQ76922
The EVM is constructed with a single connection to the top and bottom of the cell stack. Cell voltage for these cells is sensed on the board.
While the EVM has a place to mount an activated fuse, the pattern is shorted to allow easy evaluation without the concern of activating the fuse. When connecting cells use a fuse in the current path and any other signal path appropriate for your application.
The cell simulator provides resistors between the cell inputs. When the cell simulator shunts are installed, these resistors load the cells, and divide the voltage to any unconnected inputs as cells are connected. If desired, the cell simulator shunts can be installed during cell connection and removed after cell connection. The shunts must be removed after connection of cells, or the cells are discharged by the constant drain of the cell simulator resistors.
BAT- is the reference voltage for the IC and should be connected first. After BAT- cells may be connected in any order. Cell connection from the bottom up minimizes the voltage step size applied to the board. Recommended connection sequence for the EVM when connecting cells is bottom up:
Figure 5-5 shows an example connecting cells with an EVM configuration reduced to 4 cells. Be sure the Vcell mode is configured for the cells used. In this example 0x0017.