SLVUAM8B December   2015  – August 2021 TPS54A20

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Before You Begin
    2. 1.2 Background
    3. 1.3 Performance Specification Summary
    4. 1.4 Modifications
      1. 1.4.1 Output Voltage Setpoint
      2. 1.4.2 On Time
      3. 1.4.3 Adjustable UVLO
  3. 2Test Setup and Results
    1. 2.1  Input/Output Connections
    2. 2.2  Efficiency
    3. 2.3  Output Voltage Load Regulation
    4. 2.4  Output Voltage Line Regulation
    5. 2.5  Load Transients
    6. 2.6  Loop Characteristics
    7. 2.7  Output Voltage Ripple
    8. 2.8  Input Voltage Ripple
    9. 2.9  Powering Up
    10. 2.10 Thermal Image
  4. 3Board Layout
    1. 3.1 Layout
  5. 4Schematic and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
  6. 5Revision History

Powering Up

Figure 2-13 and Figure 2-14 show the start-up waveforms for the TPS54A20EVM-770. In Figure 2-13, the output voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R2 and R3 resistor divider network. In Figure 2-14, the input voltage is initially applied and the output is inhibited by using a jumper at J2 to tie EN to GND. When the jumper is removed, EN is released. When the EN voltage reaches the enable-threshold voltage, the start-up sequence begins and the output voltage ramps up to the externally set value of 1.2 V. The input voltage for these plots is 12 V and the load is 1 Ω.

GUID-AAB00CED-15BC-4B38-BC2B-020016F52658-low.gifFigure 2-13 TPS54A20EVM-770 Start-Up Relative to VIN
GUID-8FCC90DE-AB03-4F3C-814E-2DE510D79A40-low.gifFigure 2-14 TPS54A20EVM-770 Start-Up Relative to Enable