SLVUAW9C September 2016 – February 2020 UCD90320
This Read/Write Block common command configures the system reset function. The system reset function allows the device to provide an external reset signal to the system. This signal can be based on time, the power-good state of selected rails, the state of selected GPI pins, or a combination of these things. This ensures that key devices (for example, a CPU) are held in reset until other dependent devices (for example, peripherals) are fully powered. A reset pulse can also be generated as a result of a System Watchdog Timeout.
Byte Number (Write) | Byte Number (Read | Payload Index | Description | |
---|---|---|---|---|
0 | CMD = D2 | |||
1 | 0 | BYTE_COUNT = 15 | ||
2 | 1 | 0 | Page Flags – Byte 0 (LSB) | |
3 | 2 | 1 | Page Flags – Byte 1 | |
4 | 3 | 2 | Page Flags – Byte 2 | |
5 | 4 | 3 | Page Flags – Byte 3(MSB) | |
6 | 5 | 4 | GPI Flags – Byte 0 (LSB) | |
7 | 6 | 5 | GPI Flags – Byte 1 | |
8 | 7 | 6 | GPI Flags – Byte 2 | |
9 | 8 | 7 | GPI Flags - Byte3 (MSB) | |
10 | 9 | 8 | Delay Time | |
11 | 10 | 9 | Pulse Time | |
12 | 11 | 10 | 7:3 | GPI Number |
2 | De-Assert when Power-Good | |||
1 | Assert when NOT Power-Good | |||
0 | Assert when Watchdog Timeout | |||
13 | 12 | 11 | 7 | Enable |
6:5 | Reserved | |||
4 | Watchdog Timeout Assertion Uses GPI Tracking Release Delay | |||
3:0 | GPI Tracking Release Delay(100 µs) | |||
14 | 13 | 12 | GPI Tracking Release Delay (1ms) | |
15 | 14 | 13 | Reset Pin Configuration | |
16 | 15 | 14 | ||
7:3 | Reserved | |||
2 | Polarity for Reset pin | |||
1:0 | Pin mode for Reset Pin |