SLVUAW9C September 2016 – February 2020 UCD90320
Each of the input pins (GPI, and so forth) and output pins (Enable, PWM, GPO, and so forth) are configured using one byte. These bits are defined as follows:
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
|---|---|---|---|---|---|---|---|---|
| Purpose | Polarity
0 = Active low 1 = Active high |
Mode
0 = Unused 1 = Input 2 = Actively driven output 3 = Open-drain output |
||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Purpose | Table 11UCD9090 Pin ID Definitions | |||||||
Bit 11 is miscellaneous bit for the given Pin. Currently this bit is only valid for GPI_CONFIG command. When this bit is set with GPI_CONFIG command, the corresponding pin is behaved as FAULT pin instead of GPI pin. MAX 4 pin could be configured as Fault pin. Device shall NACK if there are more than 4 pins are configured as Fault pin.
Bit 10 sets the pin polarity. This determines when the pin is asserted.
Bits 9:8 set the mode for the pin.
Bits 7:0 select the Pin ID of the desired I/O pin. The pin IDs are numbers from 0 through 84.
This configuration byte is used in several of the following commands, such as SEQ_CONFIG, GPO_CONFIG, GPI_CONFIG, and FAULT_PIN_CONFIG. The command often dictates the Mode of the pin. For example, an Enable can only be an output. It cannot be configured as an input. But, for consistency, this configuration byte format is always used.
WARNING
Pin Usage Conflicts
It is possible to issue commands with pin selections that may conflict with other settings. Because the interactions between settings are so complex and depend on the order in which the PMBus commands are issued, the UCD90320 firmware does not attempt to detect and prevent all possible invalid setting combinations. The Fusion Digital Power Designer GUI provides some additional validity checking, but it is ultimately up to the user to ensure that conflicting GPIO configurations are not selected.
Example: If a command is used to configure a pin for a specific GPIO or sequencing purpose and then issued again with the same pin unassigned, the pin may not revert back to its default usage until after the controller has been reset or power cycled.
| Pin Index | UCD90320 Name | PinNum | MARGIN | EN | LGPO | GPI | GPIO |
|---|---|---|---|---|---|---|---|
| 0 | MAR01(GPIO) | J13 | Y | N | N | Y | Y |
| 1 | MAR02(GPIO) | L5 | Y | N | N | Y | Y |
| 2 | MAR03(GPIO) | D8 | Y | N | N | Y | Y |
| 3 | MAR04(GPIO) | K6 | Y | N | N | Y | Y |
| 4 | MAR05(GPIO) | D4 | Y | N | N | Y | Y |
| 5 | MAR06(GPIO) | E4 | Y | N | N | Y | Y |
| 6 | MAR07(GPIO) | F5 | Y | N | N | Y | Y |
| 7 | MAR08(GPIO) | N5 | Y | N | N | Y | Y |
| 8 | MAR09(GPIO) | N6 | Y | N | N | Y | Y |
| 9 | MAR10(GPIO) | K5 | Y | N | N | Y | Y |
| 10 | MAR11(GPIO) | M6 | Y | N | N | Y | Y |
| 11 | MAR12(GPIO) | L6 | Y | N | N | Y | Y |
| 12 | MAR13(GPIO) | D11 | Y | N | N | Y | Y |
| 13 | MAR14(GPIO) | C12 | Y | N | N | Y | Y |
| 14 | MAR15(GPIO) | A13 | Y | N | N | Y | Y |
| 15 | MAR16(GPIO) | B13 | Y | N | N | Y | Y |
| 16 | MAR17(GPIO) | D12 | Y | N | N | Y | Y |
| 17 | MAR18(GPIO) | C13 | Y | N | N | Y | Y |
| 18 | MAR19(GPIO) | E12 | Y | N | N | Y | Y |
| 19 | MAR20(GPIO) | E13 | Y | N | N | Y | Y |
| 20 | MAR21(GPIO) | M13 | Y | N | N | Y | Y |
| 21 | MAR22(GPIO) | L12 | Y | N | N | Y | Y |
| 22 | MAR23(GPIO) | M5 | Y | N | N | Y | Y |
| 23 | MAR24(GPIO) | J12 | Y | N | N | Y | Y |
| 24 | EN1(GPIO) | M9 | N | Y | N | Y | Y |
| 25 | EN2(GPIO) | N9 | N | Y | N | Y | Y |
| 26 | EN3(GPIO) | L10 | N | Y | N | Y | Y |
| 27 | EN4(GPIO) | K10 | N | Y | N | Y | Y |
| 28 | EN5(GPIO) | L9 | N | Y | N | Y | Y |
| 29 | EN6(GPIO) | K9 | N | Y | N | Y | Y |
| 30 | EN7(GPIO) | N8 | N | Y | N | Y | Y |
| 31 | EN8(GPIO) | M8 | N | Y | N | Y | Y |
| 32 | EN9(GPIO) | L8 | N | Y | N | Y | Y |
| 33 | EN10(GPIO) | K8 | N | Y | N | Y | Y |
| 34 | EN11(GPIO) | N7 | N | Y | N | Y | Y |
| 35 | EN12(GPIO) | M7 | N | Y | N | Y | Y |
| 36 | EN13(GPIO) | K7 | N | Y | N | Y | Y |
| 37 | EN14(GPIO) | L7 | N | Y | N | Y | Y |
| 38 | EN15(GPIO) | N4 | N | Y | N | Y | Y |
| 39 | EN16(GPIO) | N3 | N | Y | N | Y | Y |
| 40 | EN17(GPIO) | K3 | N | Y | N | Y | Y |
| 41 | EN18(GPIO) | K4 | N | Y | N | Y | Y |
| 42 | EN19(GPIO) | J4 | N | Y | N | Y | Y |
| 43 | EN20(GPIO) | J2 | N | Y | N | Y | Y |
| 44 | EN21(GPIO) | J3 | N | Y | N | Y | Y |
| 45 | EN22(GPIO) | H4 | N | Y | N | Y | Y |
| 46 | EN23(GPIO) | H3 | N | Y | N | Y | Y |
| 47 | EN24(GPIO) | G4 | N | Y | N | Y | Y |
| 48 | EN25(GPIO) | F13 | N | Y | N | Y | Y |
| 49 | EN26(GPIO) | F12 | N | Y | N | Y | Y |
| 50 | EN27(GPIO) | G11 | N | Y | N | Y | Y |
| 51 | EN28(GPIO) | H10 | N | Y | N | Y | Y |
| 52 | EN29(GPIO) | H13 | N | Y | N | Y | Y |
| 53 | EN30(GPIO) | H12 | N | Y | N | Y | Y |
| 54 | EN31(GPIO) | H11 | N | Y | N | Y | Y |
| 55 | EN32(GPIO) | L13 | N | Y | N | Y | Y |
| 56 | LGPO1(GPIO) | C9 | N | N | Y | Y | Y |
| 57 | LGPO2(GPIO) | B9 | N | N | Y | Y | Y |
| 58 | LGPO3(GPIO) | A9 | N | N | Y | Y | Y |
| 59 | LGPO4(GPIO) | C8 | N | N | Y | Y | Y |
| 60 | LGPO5(GPIO) | D5 | N | N | Y | Y | Y |
| 61 | LGPO6(GPIO) | C5 | N | N | Y | Y | Y |
| 62 | LGPO7(GPIO) | C6 | N | N | Y | Y | Y |
| 63 | LGPO8(GPIO) | C4 | N | N | Y | Y | Y |
| 64 | LGPO9(GPIO) | L3 | N | N | Y | Y | Y |
| 65 | LGPO10(GPIO) | M1 | N | N | Y | Y | Y |
| 66 | LGPO11(GPIO) | M2 | N | N | Y | Y | Y |
| 67 | LGPO12(GPIO) | M3 | N | N | Y | Y | Y |
| 68 | LGPO13(GPIO) | L4 | N | N | Y | Y | Y |
| 69 | LGPO14(GPIO) | N1 | N | N | Y | Y | Y |
| 70 | LGPO15(GPIO) | M4 | N | N | Y | Y | Y |
| 71 | LGPO16(GPIO) | N2 | N | N | Y | Y | Y |
| 72 | DMON1(GPIO) | F4 | N | N | N | Y | Y |
| 73 | DMON2(GPIO) | F3 | N | N | N | Y | Y |
| 74 | DMON3(GPIO) | G3 | N | N | N | Y | Y |
| 75 | DMON4(GPIO) | D10 | N | N | N | Y | Y |
| 76 | DMON5(GPIO) | L11 | N | N | N | Y | Y |
| 77 | DMON6(GPIO) | N12 | N | N | N | Y | Y |
| 78 | DMON7(GPIO) | N11 | N | N | N | Y | Y |
| 79 | DMON8(GPIO) | M11 | N | N | N | Y | Y |
| 80 | GPIO1 | B11 | N | N | N | Y | Y |
| 81 | GPIO2 | B12 | N | N | N | Y | Y |
| 82 | GPIO3 | C11 | N | N | N | Y | Y |
| 83 | GPIO4 | A12 | N | N | N | Y | Y |