SLVUAW9C September 2016 – February 2020 UCD90320
The bit definitions for the Miscellaneous Configuration Byte are shown in Table 68.
Bit(s) | Name | Description | |
---|---|---|---|
7 | Resequence Continuously | When this bit is set, there is no limit to the number of times that the device will attempt to resequence. The “Max Resequences” value does not apply. | |
6 | Resequence Abort | If a rail fails to turn off during re-sequencing, stop the re-sequencing operation | |
5:4 | Max resequences | The maximum number of times to attempt to resequence. | |
b'00 – 1 time
b'01 – 2 times b'10 – 3 times b'11 – 4 times |
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See Section 10.23.2 for more information. | |||
3 | Slave | When this bit is set, the device is a slave to take external sync clock. This bit is only valid if it is under multi-chip user case. | |
2 | Enable Log FIFO | When this bit is set, all or part of the LOGGED_FAULT_DETAIL is treated as a FIFO, depending on the “FIFO Entire Log” bit. | |
1 | External ADC Reference | When this bit is set, the external ADC reference (2.4v-3.0v) is used for ADC, see External Reference Voltage 10.41.3. A device reset is required after this bit is changed1. | |
0 | Reserved |
NOTE
It is application’s responsibility to make sure external reference is in place before setting this bit. Otherwise ADC results maybe unpredicted.