SLVUB34A April   2017  – August 2021 TPS561201

 

  1.   Trademarks
  2. 1Introduction
  3. 2Performance Specification Summary
  4. 3Modifications
    1. 3.1 Output Voltage Setpoint
  5. 4Test Setup and Results
    1. 4.1  Input/Output Connections
    2. 4.2  Start-Up Procedure
    3. 4.3  Efficiency
    4. 4.4  Load Regulation
    5. 4.5  Line Regulation
    6. 4.6  Load Transient Response
    7. 4.7  Output Voltage Ripple
    8. 4.8  Input Voltage Ripple
    9. 4.9  Start-Up
    10. 4.10 Shut-Down
  6. 5Board Layout
    1. 5.1 Layout
  7. 6Schematic, Bill of Materials, and Reference
    1. 6.1 Schematic
    2. 6.2 Bill of Materials
    3. 6.3 Reference
  8. 7Revision History

4.1 Input/Output Connections

The TPS561201EVM-896 is provided with I/O connectors and test points as shown in Table 4-1. A power supply capable of supplying 1 A must be connected to J1 through a pair of 20-AWG wires. The load must be connected to J2 through a pair of 20-AWG wires. The maximum load current capability is 1 A. Wire lengths must be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient ground reference. TP7 is used to monitor the output voltage with TP8 as the ground reference.

Table 4-1 Connection and Test Points
Reference DesignatorFunction
J1VIN (see Table 1-1 for VIN range)
J2VOUT, 1.05 V at 1-A maximum
JP1EN control. Shunt EN to GND to disable, shunt EN to VIN to enable.
TP1VIN positive monitor point
TP2GND monitor test point
TP3EN test point
TP4Switch node test point
TP5Test point for loop response measurements
TP6VOUT positive monitor point
TP7GND monitor test point
TP8GND monitor test point