SLVUBX0A July 2021 – January 2022 TPSM8A28 , TPSM8A29
The TPSM8A29 can be enabled or disabled using the J2 header. A jumper is placed between J2-2 and J2-3 to enable the device, as indicated by the silkscreen on the EVM. Using this configuration, undervoltage lockout (UVLO) can be implemented by adjusting resistors REN_HS (R2) and REN_LS (R3), which form a voltage divider between VIN and PGND. By default, the EVM is designed to work over the entire input voltage supply range of 4 V to 16 V. To configure the EVM for UVLO, see Equation 1, where REN_HS is the high-side resistor of the UVLO divider (R2), VSTART is the desired turn-on voltage, VENH is the typical enable pin threshold, and VEN_B is the low-side resistor of the UVLO divider (R3).
The TPSM8A29 can also enabled by floating the enable header. An internal pullup current source enables the device over the entire input voltage supply range. This reduces the BOM count and solution size in applications where UVLO is not required.
To disable the device, a jumper is placed in the OFF position between J2-1 and J2-2, as indicated by the silkscreen on the EVM. This shorts the EN pin of the TPSM8A29 to PGND, disabling the device.
Note that if the EN pin is to be controlled by an external source, the J2 header should be left floating, and the control source should be connected to the EN test point (TP5). The maximum recommended voltage on the EN pin is 5.5 V.