SLVUC49 April 2021 TPS51396A
6.1 Headers Description and Jumper Placement.
The TPS51396AEVM header description is as Figure 6-1. A power supply capable of supplying greater than 4 A must be connected to J1 through a pair of 20-AWG wires or better. The load must be connected to J2 through a pair of 20-AWG wires or better. The maximum load current capability is 8 A. Wire lengths must be minimized to reduce losses in the wires. Test point TP2 provides a place to monitor the VIN input voltages with TP9 providing a convenient ground reference. TP3 is used to monitor the output voltage with TP11 as the ground reference.
Figure 6-1 Headers Description and Jumper PlacementConnector and test point description is as Table 6-1.
Table 6-1 Input and Output Connection
| # | FUNCTION | DESCRIPTION |
|---|---|---|
| J1 | VIN connector | VIN power |
| J2 | VOUT connector | VOUT power |
| J3 | Internal/external Soft Start selection | When short J3, IC uses external SS by charging the cap C6. When float J3, IC uses internal SS. |
| J4 | Enable control | Middle pin is Buck Enable PIN. When this PIN is floating, the IC is disable. When the jumper short EN on, IC is enable. When the jumper short EN off, IC is disable. |
| J5 | Mode selection | This EVM provides three kinds of mode. When short OOA, IC works with out of audio mode, frequency is 600kHz. When short ECO, IC works with pulse skip mode, frequency is 600kHz. |
| TP1 | VCC test point | Test VCC |
| TP2 | VIN test point | Test VIN |
| TP8/9/10/11/14/15/16 | GND connector | Ground |
| TP4 | VIN connector | VIN power |
| TP12 | PGOOD test point | Test PGOOD |
| TP6 | SW test point | Test SW |
| TP5 | VOUT test point | Test VOUT |
| TP3 | VOUT connector | VOUT loading |
| TP7 | Loop test point | Test loop |
| TP13 | Enable test point | Test Enable signal |