SLVUCG9 October   2022 TPS36-Q1

 

  1.   Abstract
  2. 1Trademarks
  3. 2Introduction
    1. 2.1 Related Documentation
  4. 3Schematic, Bill of Materials, and Layout
    1. 3.1 TPS36Q1EVM Schematic
    2. 3.2 TPS36Q1EVM Bill of Materials
    3. 3.3 Layout and Component Placement
  5. 4EVM Connectors
    1. 4.1 EVM Jumpers
    2. 4.2 EVM Test Points
  6. 5EVM Setup and Operation
    1. 5.1 Input Power (VDD)
    2. 5.2 RESET
    3. 5.3 Manual Reset (MR)
    4. 5.4 SET0 and SET1
    5. 5.5 Watchdog Enable (WD_EN)
    6. 5.6 Watchdog Input (WDI)
    7. 5.7 Watchdog Output (WDO)
    8. 5.8 CRST
    9. 5.9 CWD
  7. 6EVM Performance Results
  8. 7Revision History

5.8 CRST

A capacitor between the CRST pin and GND sets the output assert time tD. The TPS36Q1EVM offers two pre-installed options: 0.01µF and 1µF. These capacitors correspond to 49.5ms and 4.95s tD time delays, respectively. Refer to Table 4-1 and Table 4-2 for suggested jumper settings. If other timing option is needed, the capacitor may be replaced. Refer to the respective device data sheet to determine the capacitor value for required timing.