SLVUCG9 October   2022 TPS36-Q1

 

  1.   Abstract
  2. 1Trademarks
  3. 2Introduction
    1. 2.1 Related Documentation
  4. 3Schematic, Bill of Materials, and Layout
    1. 3.1 TPS36Q1EVM Schematic
    2. 3.2 TPS36Q1EVM Bill of Materials
    3. 3.3 Layout and Component Placement
  5. 4EVM Connectors
    1. 4.1 EVM Jumpers
    2. 4.2 EVM Test Points
  6. 5EVM Setup and Operation
    1. 5.1 Input Power (VDD)
    2. 5.2 RESET
    3. 5.3 Manual Reset (MR)
    4. 5.4 SET0 and SET1
    5. 5.5 Watchdog Enable (WD_EN)
    6. 5.6 Watchdog Input (WDI)
    7. 5.7 Watchdog Output (WDO)
    8. 5.8 CRST
    9. 5.9 CWD
  7. 6EVM Performance Results
  8. 7Revision History

5.2 RESET

For the TPS35-Q1 and TPS36-Q1 options A, B, and C, the RESET pin will assert on either VDD going below the supervisor threshold, the MR pin being pulled low, or the watchdog detecting a fault. To access the RESET output, a probe can be attached to TP7. For pinout option D devices, supervisor faults are mapped to the RESET pin and watchdog faults are mapped to the WDO pin.

Please note that if using a push-pull output variant, the shunt jumper on J6 must be removed as a pull-up is not needed.