SLVUCI9 November   2023 TPS61289

 

  1.   1
  2.   TPS61289EVM-113 Evaluation Module
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Performance Specification
    2. 1.2 Modification
  5. 2EVM Configuration
    1. 2.1 EVM Top View and Circuit Layout Partitions
    2. 2.2 Connector, Test Point and Jumper Descripitions
      1. 2.2.1 Connector and Test Point Description
      2. 2.2.2 Jumper Configuration
  6. 3Test Procedure
    1. 3.1 Bench Setup
    2. 3.2 Boost Mode or Battery Discharge Mode Test Procedure
      1. 3.2.1 Power up and Power down Sequence
      2. 3.2.2 Test Waveform
    3. 3.3 Buck Mode or Battery Charge Mode Test Procedure
      1. 3.3.1 Power-up and Power-down sequence
      2. 3.3.2 Test Waveform
    4. 3.4 Operating the EVM with USB2ANY
      1. 3.4.1 Install USB2ANY Explorer
      2. 3.4.2 USB2ANY Connection
      3. 3.4.3 USB2ANY Interface Introduction
      4. 3.4.4 Test Procedure with USB2ANY
  7. 4Schematic, Bill of Materials, and Board Layout
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
    3. 4.3 Board Layout
  8. 5Revision History

Board Layout

The TPS61289EVM-113 board is a 4-layer PCB. The top and bottom layers copper thickness are 2-oz. The two inner layers copper thickness are 1-oz. Figure 4-2 and Figure 4-5 show the top view and bottom view, respectively. Figure 4-3 and Figure 4-4 show the inner layer 1 and inner layer 2, respectively.

GUID-20231106-SS0I-Z018-XMKX-3CFQWHWTWGZ9-low.svg Figure 4-2 TPS61289EVM-113 Top-Side Layout
GUID-20231106-SS0I-TVSX-L4FN-069QN3VCNL1G-low.svg Figure 4-3 TPS61289EVM-113 Inner Layer1 Layout
GUID-20231106-SS0I-NVTC-7TGN-KWR9JSRP4DCH-low.svg Figure 4-4 TPS61289EVM-113 Inner Layer2 Layout
GUID-20231106-SS0I-HVDL-DCRL-KJN6HQMFQKXL-low.svg Figure 4-5 TPS61289EVM-113 Bottom-Side Layout