SLVUCM2A january   2023  – july 2023 TPSF12C3 , TPSF12C3-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 EVM Description
    2. 2.2 Setup
      1. 2.2.1 High-Voltage Testing
      2. 2.2.2 EVM Connections
      3. 2.2.3 Low-Voltage Testing
    3. 2.3 Header Information
    4. 2.4 EVM Performance Validation
    5. 2.5 AEF Design Flow
      1. 2.5.1 AEF Circuit Optimization and Debug
  9. 3Implementation Results
    1. 3.1 EMI Performance
    2. 3.2 Insertion Loss
    3. 3.3 Surge Immunity
    4. 3.4 SENSE and INJ Voltages
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout
      1. 4.3.1 Assembly Drawings
      2. 4.3.2 Multi-Layer Stackup
  11. 5Compliance Information
    1. 5.1 Compliance and Certifications
  12. 6Additional Information
    1.     Trademarks
  13. 7Related Documentation
    1. 7.1 Supplemental Content
  14. 8Revision History

Features

  • Improved CM EMI performance for applications with three-phase AC input
    • Helps to meet EMI standards, such as CISPR 11, 25 or 32
    • Voltage-sense, current-inject AEF topology presents low shunt impedance to ground
      • Up to 30 dB reduction in the CM EMI signature from 100 kHz to 3 MHz
    • A higher effective Y-capacitance enables a reduction in CM choke size, weight and cost
    • No additional magnetic components required
  • Simple configuration for three-phase AC systems
    • Integrated sensing filter and summing network
    • Low Y-capacitor line-frequency leakage current to chassis ground maintains safety
    • Simplified compensation and damping network
  • Inherent protection features for reliable design
    • Withstands 6-kV+ surge with minimal external component count
      • Helps meet IEC 61000-4-5 surge immunity system-level specification
      • Integrated SENSE input surge protection
    • Wide VDD supply voltage range of 8 V to 16 V
      • Undervoltage lockout (UVLO) set to turn on and off at 7.7 V and 6.7 V, respectively
      • Quiescent supply current of 12.5 mA
    • 175°C thermal shutdown protection
    • Integrated VDD-to-EN pullup allows use of an open-drain/collector device for disable function
  • Fully assembled, tested and proven four-layer PCB design with 1" × 0.8" (25 mm × 20 mm) total area