SNIU041B May   2021  – August 2022 TMP114

 

  1.   TMP114EVM User's Guide Abstract
  2. 1Trademarks
  3. 2Overview
    1. 2.1 EVM Kit Contents
  4. 3EVM Hardware
    1. 3.1 TMP114EVM Board
    2. 3.2 Perforations
    3. 3.3 Subregulator
    4. 3.4 Logic Level Translator
    5. 3.5 Status LEDs
    6. 3.6 Programming Header
    7. 3.7 BSL Button
    8. 3.8 EVM Operating Conditions
  5. 4Software Download
    1. 4.1 Live Software on dev.ti.com
    2. 4.2 Offline Software
      1. 4.2.1 Download from dev.ti.com
  6. 5Software
    1. 5.1 Home Tab
    2. 5.2 Data Capture Tab
    3. 5.3 Settings Tab
    4. 5.4 Registers Tab
    5. 5.5 Collateral Tab
  7. 6Schematic, Board Layout and Bill of Materials
    1. 6.1 Schematic
    2. 6.2 Printed Circuit Board (PCB)
    3. 6.3 Bill of Materials
  8. 7Revision History

3.4 Logic Level Translator

The translator U3 separates the MSP430 I2C host from the TMP114 device. This is not required for end applications, but the translator is provided on the EVM as a courtesy. When the subregulator is disabled, a voltage between 1.2 V and 1.8 V can be applied at the VDD net, which is the VDD pin on the perforation, or pin 2 of the header J3. This external voltage will illuminate the green LED D3 and power the TMP114 device.