8 Pseudo-Random Bit Sequence Functions

The DP83TD510E incorporates a Pseudo-Random Bit Sequence (PRBS) generator and checker to allow for Built-in Self-Test (BIST), as well as a cable diagnostic tool. The PRBS circuity can be utilized for internal loopback modes or to send data over the MAC or MDI interfaces. The PRBS simulates pseudo-random data transfer scenarios in the format of real packets and Inter-Packet Gap (IPG) on the lines. The PRBS allows the designer control over the packet length and IPG to simulate expected throughputs of the application. The PRBS is implemented with independent transmit and receive paths, with the transmit block capable of generating a continuous stream of a pseudo-random sequence.

The receive status of whether the PRBS checker is locked to the incoming bit stream, whether the PRBS has lost sync, and whether the packet generator is busy, can be read from the PRBS_STATUS_4 register (0x011F). While the lock and sync indications are required to identify the beginning of proper data reception, for any link failures or data corruption, the best indication is the contents of the error counter in the PRBS_STATUS_4 register. The number of received packets is stored in PRBS_STATUS_2 (0x011D).

The PRBS test can be put in a continuous packet generation mode by using the PRBS_CFG_1 register (0x0119). In continuous mode, when one of the PRBS counters reaches the maximum value, the counter starts counting from zero again.

Enable continuous PRBS generator:
Begin 
//Enable continuous PRBS generator/checker over Copper TX/RX
//Note the link partner should be in reverse loopback mode for PRBS checker to have data stream to evaluate
0119 0557
End
PRBS receive data checker: 
Begin
//Write 0x011F[0] to latch packet, error counter values
011F 0001
//Read 0x011F for generator status, sync lock, bit errors
//0x011F = 0x0B00 is indicative of PRBS lock and no errors, passing result
011F
End