SNLA438 September 2023 DP83822H , DP83822HF , DP83822I , DP83822IF , DP83826E , DP83826I , DP83867CS , DP83867E , DP83867IS , DP83869HM
If hardware bootstraps are not sufficient, our Ethernet PHYs can be configured via Register Writes, which can change the PHYs mode, regardless of how the Bootstraps are configured.
As mentioned in the bootstrap section, the DP83869 cannot be configured into MII mode with Bootstraps alone, register writes are required.
Register Address | Write Value | Remarks |
---|---|---|
01DF | See Remark |
OP_MODE_DECODE: RGMII to Copper write: 0000 RGMII to 1000Base-X: 0001 RGMII to 100Base-FX: 0002 |
0000 | 1140 |
Auto-negotiation enabled, Full Duplex Mode, For Forced 100Mbps write 2100 For Forced 1000Mbps write 2140, Note: Not recommended |
0004 | 0101 |
De-advertise 10Base-T and Half Duplex 100Base-Tx |
0009 | 0200 | De-advertise Half-Duplex for 1000Base-T |
0010 | 5048 |
Auto MDI-X enable |
002D | 801F |
FLD Enable Last nibble 'F' sets Fast Link Drop Functionality Details can be found in Data Sheet, search for "Offset = 2Dh" |
001F | 4000 | Soft Reset PHY |
Register Address | Write Value | Remarks |
---|---|---|
01DF | See Remark |
OP_MODE_DECODE: MII to Copper write: 0060 MII to Fiber write: 0062 |
0000 | 1140 |
Auto-negotiation enabled, Full Duplex Mode, For Forced 100Mbps write 2100 |
0004 | 0101 |
De-advertise 10Base-T and Half Duplex 100Base-Tx |
0009 | 0000 | De-advertise 1000Base-T |
0010 | 5048 |
Auto MDI-X enable |
0018 | 000E | Required for MII Operation. |
001F | 4000 | Soft Reset PHY |