SNLU343 June   2024 DP83TD510E

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Quick Setup
    2. 2.2 Header Information
    3. 2.3 Push Buttons
    4. 2.4 Debug Information
  8. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  9. 4Additional Information
    1. 4.1 Trademarks

2.4 Debug Information

This section details some common issues that arise while using the boards.

The USB port does not need to be connected and cannot be used to power the boards. External 24 V are always needed on the PSE side.

Do not connect both USB ports (PSE and PD) to the same computer, USB hub or something sharing the same ground. These two USB connectors need to be isolated to each other for the PD to work properly.

No register access is possible on the PSE as long as no power connection is established, as the DP83TD510E is kept in reset in idle state. This also impacts the DP83822, as the clock is derived from DP83TD510E.

The layout provides the possibility to test different data transformers and coupling networks as well. Therefore, the layout is not optimized for EMC, and can be disturbed by EFT or ESD events causing intermittent link loss. Also, do not use this layout as reference, the option for different transformers violates the proper differential routing in some cases. However, this does not impact the performance in a lab environment.