Using Comparators in Octal Small Form Factor Pluggable Modules
Optical Modules
The Octal Small Form Factor Pluggable (OSFP) module is an optical transceiver designed to provide high speed 400G/800G data communications for data centers and networking systems. The OSFP multi-source agreement (MSA) restricts the dimensions of a Type 1 OSFP module to 100.40mm x 22.68mm x 13.10mm. Due to the compact form factor, there is an increasing need for more integrated designs with small land patterns.
Comparator Functions in OSFP Modules
In OSFP transceivers, comparators (along with several resistors and a reference) are needed to enable multi-level bidirectional signaling between the host and the module. As shown in Figure 1, comparators are used to monitor the INT/RSTn voltage to allow the module to raise an interrupt to the host and to allow the host to reset the module. Additionally, comparators are used to monitor the LPWn/PRSn voltage that allows the host to signal low power mode and the module to indicate the presence of the module.
Figure 1 OSFP INT/RSTn and LPWn/PRSn CircuitTLV4062
As mentioned previously, due to the space constraints of the module, a small sized design is crucial to perform these voltage detection functions. One device that can be appropriate for this application can be TLV4062, which is a dual-channel push-pull comparator that features high-accuracy integrated reference thresholds (VIT+ and VIT-) with an internal hysteresis of 60mV. The output transitions high when the input is rising and goes above VIT+ (1.194V); the output transitions low when the input is falling and drops below VIT- (1.134V).
Figure 2 TLV4062 Functional Block Diagram and Transfer CurveTLV4062 is available in a 1.45mm x 1.00mm μSON package and can operate with a 1.5V to 5.5V supply. Additionally, the fail safe inputs can swing from ground to 5.5V, regardless of the device supply voltage. This feature allows the TLV4062 to monitor voltages from the 3.3V rail on the host side, while propagating 1.8V logic for lower voltage components downstream on the module side. TLV4062 is space efficient because the TLV4062 can perform this level translation operation without the use of a discrete pull-up resistor.
Figure 3 3.3V to 1.8V Level Translation with TLV4062Although the reference threshold is not at 1.25V, the logic and operation of the circuit using TLV4062 is still valid since the voltage signals are within the allowable ranges for the correct voltage zones listed in the OSFP MSA. Figure 4 and Figure 5 show TLV4062 propagating the correct output logic in nominal INT/RSTn and LPWn/PRSn circuits.
Figure 4 Output Waveforms for INT/RSTn Circuit Using TLV4062
Figure 5 Output Waveforms for LPWn/PRSn Circuit Using TLV4062Worst Case Analysis
The failure condition in the use of TLV4062 for OSFP module designs is the improper signaling from host to module. The signal fails to propagate from host to module if the INT/RSTn or LPWn/PRSn voltage is not able to cross the threshold determined by the TLV4062 internal reference. If the voltage is within Zone 2 or Zone 3, the voltage must go below VIT- for the output of the comparator to transition. If the voltage is within Zone 1, the voltage must go above VIT+ for the output of the comparator to transition. Since TLV4062 has thresholds VIT+ and VIT- at 1.194V and 1.134V respectively, possible failures can occur at the boundary of voltage Zone 1 and Zone 2.
Figure 6 INT/RSTn and LPWn/PRSn Voltage ZonesTo show proper operation in worst case conditions, the circuits were simulated with worst case resistor and power supply values as specified in the OSFP MSA. Figure 7 and Figure 8 show the operation of the INT/RSTn circuit with minimum/maximum voltages using worst case values. Figure 9 and Figure 10 show the operation of LPWn/PRSn circuit with minimum/maximum voltages using worst case values. As shown in the simulations, both signals are able to propagate through to the module even with the worst case resistor and power supply values.
Figure 7 Output Waveforms for Minimum INT/RSTn Voltage using TLV4062
Figure 8 Output Waveforms for Maximum INT/RSTn Voltage using TLV4062
Figure 9 Output Waveforms for Minimum LPWn/PRSn Voltage using TLV4062
Figure 10 Output Waveforms for Maximum LPWn/PRSn Voltage using TLV4062Design References
See the Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.
See the following Texas Instruments documents:
- Voltage Supervision with a Comparator application brief
- TLV4062, TLV4082 Dual-Channel, Low-Power Comparator with Integrated Reference data sheet
Circuit SPICE Simulation File: SBVM995
| TLV4062 | |
|---|---|
| VDD | 1.5V-5.5V |
| VIN | 0V-5.5V |
| IDD | 2.09µA |
| VIT+ | 1.194V |
| VIT- | 1.134V |
| Output Type | Push-Pull |
| Number of Channels | 2 |
