SNOU173A October   2020  – December 2020 LM7310

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 EVM Features
    2. 1.2 EVM Applications
  3. 2Description
  4. 3Schematic
  5. 4General Configurations
    1. 4.1 Physical Access
    2. 4.2 Test Equipment and Set up
      1. 4.2.1 POWER SUPPLIES
      2. 4.2.2 METERS
      3. 4.2.3 OSCILLOSCOPE
      4. 4.2.4 LOADS
  6. 5Test Setup and Procedures
    1. 5.1 Startup Test
    2. 5.2 ORing of Two Power Supplies Test
    3. 5.3 Reverse Current Blocking Test
    4. 5.4 Output Short-Circuit Test
    5. 5.5 Input Reverse Polarity Test
  7. 6EVAL Board Assembly Drawings and Layout Guidelines
    1. 6.1 PCB Drawings
  8. 7Bill Of Materials (BoM)
  9. 8Revision History

2 Description

The LM73100EVM Integrated Ideal Diode Evaluation Board enables evaluation of LM73100 Integrated Ideal Diode device through two channels. The input power is applied at connectors J5 (for Channel1) and J10 (for Channel2) while J1(for Channel1) and J7 (for Channel2) provides the output connection to the load; refer to the schematic in Figure 3-1, and EVM test setup in Figure 5-1.

S1 and S2 allows U1 and U2 to be RESET or disabled respectively. A power good (PG) indicator is provided by D6 (for Channel1) and D11 (for Channel2). Scaled device current can be monitored at TP15 with a scale factor of 0.22 V/A.

Table 2-1 LM73100EVM Integrated Ideal Diode Evaluation Board Options and Setting
EVM Function

Channel

VIN RangeVin UVLOVin OVLOOutput Slew Rate

Load Current Monitor

Power Good Threshold
2.7 V to 23 V, 5.5-A ideal diode

CH1

2.7 V to 23 V10.8 V

Programmable

Programmable0.22 V/A or option to disable

10.87 V

CH2

10.8 V

13.76 V

0.2 V/ms

0.22 V/A