SNOU197 july   2023 TLV3607

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Recommended Equipment Setup
    2. 2.2 Board Setup
      1. 2.2.1 Power Supplies
      2. 2.2.2 Inputs
      3. 2.2.3 Outputs
      4. 2.2.4 Hysteresis
    3. 2.3 Quick-Start Procedure
  7. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials
  8. 4Additional Information
    1.     Trademarks

Inputs

Resistors R4 and R12 are 0-Ω resistors. The non-inverting input terminals (IN+A and IN+B) have corresponding sense lines so that the inputs to the device can be terminated on the lines with 50-Ω to an oscilloscope. This allows the input signals to be observed with minimal loading and distortion. There are also optional input resistors (R6 and R9) for direct 50-Ω termination if required by the input signal generator, otherwise the input resistors can be left uninstalled.

GUID-20230524-SS0I-3ZPF-4P0B-3KHQK6P0MSMS-low.svgFigure 2-2 Input Side Block Diagram

The TLV3607 can be put in either active or shutdown mode through the SHDNA and SHDNB pins. Each channel of the TLV3607 is in shutdown mode when their respective shutdown pins are tied to VEE though jumpers J1 and J13; otherwise the pins can be left open or tied to VCCO. If necessary to dynamically control when the device shutdowns, then a pulsing signal can be applied to SMA connectors J2 and J16.

The TLV3607 utilizes pins LE/HYSA and LE/HYSB to adjust the internal hysteresis of the comparator through the attachment of a external resistors R2 and R14 connecting to VEE. R2 and R14 are 150-kΩ resistors to allow for 30 mV of internal hysteresis, but these resistors can be replaced accordingly to desired amount of hysteresis. C4 and C7 are 100 pF capacitors for extra filtering.

Alternatively, these pins also have a latch functionality. If the pin is connected to VEE, then the device holds the output state for as long as the pin remains connected to that voltage. If the pin is connected to VCC, then the device functions normally with no hysteresis. However, if necessary to dynamically control when the device latches, then a pulsing signal can be applied to SMA connectors J4 and J15.

GUID-20230524-SS0I-PD7K-TLPP-KZSK06JCQZ6W-low.svg Figure 2-3 SHDN and LE/HYS Side Block Diagram