SNVA966 July   2020  – MONTH  LP8864-Q1 , LP8864S-Q1 , LP8866-Q1 , LP8866S-Q1

 

  1.   Trademarks
  2. 1Fault Handling Routine
  3. 2Different Fault and Diagnostic Handling Method Recommendation
    1. 2.1 Different Fault Handling Method
      1. 2.1.1 System Brightness Derating
      2. 2.1.2 System-Level Unrecoverable Critical Fault
      3. 2.1.3 System-Level Sustainable Fault
    2. 2.2 Different Diagnostic Wrong Information Handling Method
      1. 2.2.1 System-Level Critical Wrong Diagnostic Information
      2. 2.2.2 System Level Sustainable Wrong Diagnostic Information
  4. 3Summary
  5.   A Fault-Related Functions
    1.     A.1 Protection and Fault Detections
      1.      A.1.1 Supply Faults
        1.       A.1.1.1 VIN Undervoltage Faults (VINUVLO)
        2.       16
        3.       A.1.1.2 VIN Overvoltage Faults (VINOVP)
        4.       A.1.1.3 VDD Undervoltage Faults (VDDUVLO)
        5.       A.1.1.4 VIN OCP Faults (VINOCP)
        6.       A.1.1.5 Charge Pump Faults (CPCAP, CP)
        7.       A.1.1.6 Boost Sync Clock Invalid Faults (BSTSYNC)
        8.       A.1.1.7 CRC Error Faults (CRCERR)
      2.      A.1.2 Boost Faults
        1.       A.1.2.1 Boost Overvoltage Faults (BSTOVPL, BSTOVPH)
        2.       A.1.2.2 Boost Overcurrent Faults (BSTOCP)
        3.       A.1.2.3 LEDSET Resistor Missing Faults (LEDSET)
        4.       A.1.2.4 MODE Resistor Missing Faults (MODESEL)
        5.       A.1.2.5 FSET Resistor Missing Faults (FSET)
        6.       A.1.2.6 ISET Resistor Out of Range Faults (ISET)
        7.       A.1.2.7 Thermal Shutdown Faults (TSD)
      3.      A.1.3 LED Faults
        1.       A.1.3.1 Open LED Faults (OPEN_LED)
        2.       A.1.3.2 Short LED Faults (SHORT_LED)
        3.       A.1.3.3 LED Short to GND Faults (GND_LED)
        4.       A.1.3.4 Invalid LED String Faults (INVSTRING)
        5.       A.1.3.5 I2C Timeout Faults
      4.      A.1.4 Overview of the Fault and Protection Schemes
    2.     A.2 Programming Examples
      1.      A.2.1 Clearing Fault Interrupts
      2.      A.2.2 Disabling Fault Interrupts
      3.      A.2.3 Diagnostic Registers

A.2.2 Disabling Fault Interrupts

By default, most of the LP886XX-Q1 faults trigger the INT pin. Each fault has two INT_EN bits. These bits are located in the SUPPLY_INT_EN, BOOST_INT_EN, and LED_INT_EN registers. If the INT_EN bit is read and returns 2b'10, the INT pin is triggered when that fault occurs. The fault interrupt can be disabled by writing 2b'01 to its INT_EN bits, or it can be enabled by writing 2b'11 to its INT_EN bits. There is also a GLOBAL fault interrupt that can be disabled to prevent any faults from triggering the INT pin.