SNVAA82 august   2023 LMR38020

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Fly-Buck Converter
  6. 3Fly-Buck Basic Operation
    1. 3.1 Basic Intervals of Steady State Operation
    2. 3.2 Impact Of Leakage Inductor On Fly-Buck Operation
  7. 4Design A Fly-Buck Converter with LMR38020
    1. 4.1 IC Select
    2. 4.2 Switching Frequency Set
    3. 4.3 Transformer Design
      1. 4.3.1 Turns Ratio
      2. 4.3.2 Magnetic Inductance
      3. 4.3.3 Check Ipk
    4. 4.4 Output Capacitor Selection
      1. 4.4.1 Primary Output Capacitor
      2. 4.4.2 Secondary Output Capacitor
    5. 4.5 Secondary Output Diode
    6. 4.6 Preload Resistor
  8. 5Bench Test Results
    1. 5.1 Typical Switching Waveforms Under Steady State
    2. 5.2 Start Up
    3. 5.3 Efficiency
    4. 5.4 Load Regulation
    5. 5.5 Short Circuit
    6. 5.6 Thermal Performance
  9. 6Design Considerations
  10. 7Summary
  11. 8References

6 Design Considerations

Following are some tips in choosing a proper IC as well as in designing a Fly-Buck™ converter design.
  • An IC that offers Forced Pulse Width Modulation (FPWM) needs to be selected and make sure the part can handle negative inductor current. A good example is the LMR38020FADDA.
  • To design an (1+n) output Fly-Buck converter, where n is the number of secondary outputs,, the designer needs to choose a buck converter IC having the equivalent rated load current no less than (ipri+Nps1*Isec1+ Nps2*Isec2+…+ Npsn*Isecn), Npsn is the turns ratio.
  • Make sure ipri_pk of the Fly-Buck design does not exceed either the positive nor negate peak current limit of the IC.
  • A small preload may be required for the secondary outputs to prevent the output voltage from rising too high under no load in that output. Usually, the preload resistor is in the order or 1kΩ-10kΩ. It is also possible to use a Zener based clamp instead of a preload resistor. This avoids power loss in the Zener under normal operations..
  • It is preferred to select the primary output voltage Vpri for Dmax < 0.5 (VINMIN>2*Vpri). If Dmax > 0.5, pay attention to check the isolated output voltage regulation under VINMIN and making sure it can satisfy design requirements. (Note that a lower LLK and lower fsw helps to achieve larger duty cycle).
  • Do not short secondary VOUT to ground for long time if the device does not have a hiccup mode for negative overcurrent protect.