VIN SUPPLY VOLTAGE |
|
I(SHUTDOWN) |
Shutdown mode current |
VIN 8 V- 18 V, EN1 = 0 V, EN2 = 0 V, VCCX = 0 V |
|
9 |
12.5 |
µA |
I(STANDBY) |
Standby current |
EN1 = 5 V, EN2 = 0 V, VOUT1, in regulation, no-load, not switching. VIN 8 V - 18 V. DEMB = GND |
|
35 |
|
µA |
Or EN1 = 0 V, EN2 = 5 V, VOUT2 in regulation, no-load, not switching, VOUT2 connected to VCCX, DEMB = GND. |
|
42 |
|
µA |
VCC REGULATOR |
|
VCC(REG) |
VCC regulation voltage |
VIN = 6 V - 18 V, 0 - 150 mA, VCCX = 0 V |
4.75 |
5 |
5.25 |
V |
VCC(UVLO) |
VCC under voltage threshold |
VCC rising, VCCX = 0 V |
3.25 |
3.4 |
3.55 |
V |
VCC(HYST) |
VCC hysteresis voltage |
VCCX = 0 V |
|
175 |
|
mV |
ICC(LIM) |
VCC sourcing current limit |
VCCX = 0 V |
170 |
250 |
|
mA |
VDDA |
|
VDDA(REG) |
Internal bias supply power |
VCCX = 0 V |
4.75 |
5 |
5.25 |
V |
VDDA(UVLO) |
VDDA undervoltage lockout |
VCC rising, VCCX = 0 V |
3.1 |
3.2 |
3.3 |
V |
VDDA(HYST) |
VDDA hysteresis voltage |
VCCX = 0 V |
|
180 |
|
mV |
R(VDDA) |
VDDA resistance |
VCCX = 0 V |
|
50 |
|
Ω |
VCCX |
|
VCCX(ON) |
VCC(ON) threshold |
VCC rising |
4.1 |
4.3 |
4.4 |
V |
R(VCCX) |
VCCX resistance |
VCCX = 5 V |
|
1 |
|
Ω |
VCCX(HYST) |
VCCX hysteresis voltage |
|
|
200 |
|
mV |
OSCILLATOR SELECT THRESHOLDS |
|
|
2.2-MHz Oscillator select threshold |
(OSC pin) |
2.4 |
|
|
V |
|
440-kHz Oscillator select threshold |
(OSC pin) |
|
|
0.4 |
V |
CURRENT LIMIT |
|
V(CS1) |
Current limit threshold1 |
ILSET = VDDA, Measure from CS to VOUT |
66 |
73 |
80 |
mV |
V(CS2) |
Current limit threshold2 |
ILSET = GND, Measure from CS to VOUT |
44 |
48 |
53 |
mV |
|
Current sense delay to output |
|
|
40 |
|
ns |
|
Current sense amplifier gain |
|
11.4 |
12 |
12.6 |
V/V |
ICS(BIAS) |
Amplifier input bias |
|
|
|
10 |
nA |
|
75-mV current limit select threshold (ILSET) |
|
2.4 |
|
|
V |
|
75-mV current limit select threshold (ILSET) |
|
|
|
0.4 |
V |
RES |
|
I(RES) |
RES current source |
|
|
20 |
|
µA |
V(RES) |
RES threshold |
|
|
1.2 |
|
V |
|
Timer hIccup mode fault |
|
|
512 |
|
cycles |
RDS(ON) |
RES pulldown |
|
|
5 |
|
Ω |
OUTPUT VOLTAGE REGULATION |
|
|
3.3 V |
VIN = 3.8 V - 42 V |
3.273 |
3.3 |
3.327 |
V |
|
5 V |
VIN = 5.5 V - 42 V |
4.95 |
5 |
5.05 |
V |
|
8 V |
VIN = 8.5 V - 42 V |
7.92 |
8 |
8.08 |
V |
FEEDBACK |
|
|
VOUT1 select threshold 3.3-V Output |
|
VDDA – 0.3 |
|
|
V |
|
VOUT2 select threshold 5 V |
|
VDDA – 0.3 |
|
|
V |
Regulated Feedback Voltage |
|
|
1.19 |
1.2 |
1.21 |
V |
FB(LOWRES) |
Resistance to ground on FB for FB=0 detection |
|
|
|
500 |
Ω |
FB(EXTRES) |
Thevenin equivalent resistance at FB for external regulation detection |
FB < 2 V |
5 |
|
|
kΩ |
TRANSCONDUCTANCE AMPLIFIER |
|
Gm |
Gain |
Feedback to COMP |
1010 |
1200 |
|
µS |
FB |
Input Bias Current |
|
|
|
15 |
nA |
|
Transconductance Amplifier source current |
COMP = 1 V, FB = 1.0 V |
|
100 |
|
µA |
|
Transconductance Amplifier sink current |
COMP = 1 V, FB = 1.4 V |
|
100 |
|
µA |
POWER GOOD |
|
PG(UV) |
PG1 and PG2 Under Voltage trip levels |
Falling with respect to the regulation voltage |
90% |
92% |
94% |
|
PG(OVP) |
PG1 and PG2 Over Voltage trip levels |
Rising with respect to the regulation voltage |
108% |
110% |
112% |
|
PG(HYST) |
Power Good hysteresis voltage |
|
|
3.4% |
|
|
PG(VOL) |
PG1 and PG2 |
Open Collector, Isink = 2 mA |
|
|
0.4 |
V |
PG(rdly) |
OV Filter Time |
VOUT rising |
|
25 |
|
µs |
PG(fdly) |
UV Filter Time |
VOUT falling |
|
30 |
|
µs |
HO GATE DRIVER |
|
VOLH |
HO Low-state output voltage |
IHO = 100 mA |
|
0.05 |
|
V |
VOHH |
HO High-state output voltage |
IHO = -100 mA, VOHH = VHB - VHO |
|
0.07 |
|
V |
trHO |
HO rise time (10% to 90%) |
CLOAD = 2700 pf |
|
4 |
|
ns |
tfHO |
HO fall time (90% to 10%) |
CLOAD = 2700 pf |
|
3 |
|
ns |
IOHH |
HO peak source current |
VHO = 0 V, SW = 0 V, HB = 5 V, VCCX = 5 V |
|
3.25 |
|
Apk |
IOLH |
HO peak sink current |
VCCX = 5 V |
|
4.25 |
|
Apk |
V(BOOT) |
UVLO |
HO falling |
|
2.5 |
|
V |
Hysteresis |
|
|
110 |
|
mV |
I(BOOT) |
Quiescent current |
|
|
3 |
|
µA |
LO GATE DRIVER |
|
VOLL |
LO Low-state Output Voltage |
ILO = 100 mA |
|
0.05 |
|
V |
VOHL |
LO High-state Output voltage |
ILO = -100 mA, VOHL = VCC - VLO |
|
0.07 |
|
V |
trLO |
LO rise time (10% to 90%) |
CLOAD = 2700 pf |
|
4 |
|
ns |
tfLO |
LO fall time (90% to 10%) |
CLOAD = 2700 pf |
|
3 |
|
ns |
IOHL |
LO peak source current |
VCCX = 5 V |
|
3.25 |
|
Apk |
IOLL |
LO peak sink current |
VCCX = 5 V |
|
4.25 |
|
Apk |
ADAPTIVE DEAD TIME CONTROL |
|
V(GS-DET) |
VGS detection threshold |
VGS falling, no-load |
|
2.5 |
|
V |
tdly1 |
HO off to LO on dead time |
|
|
20 |
|
ns |
tdly2 |
LO off to HO on dead time |
|
|
15 |
|
ns |
DIODE EMULATION |
|
VIL |
DEM input low threshold |
|
|
|
0.4 |
V |
VIH |
FPWM input high threshold |
|
2.4 |
|
|
V |
SW |
zero cross threshold |
|
|
–5 |
|
mV |
ENABLE INPUTS EN1 AND EN2 |
|
VIL |
Enable input low threshold |
VCCX = 0 V |
|
|
0.4 |
V |
VIH |
Enable input high threshold |
VCCX = 0 V |
2.4 |
|
|
V |
Ilkg |
Leakage |
EN1, EN2 logic inputs only |
|
1 |
|
µA |
SYN INPUT |
|
VIL |
SYNIN input low threshold |
|
|
|
0.4 |
V |
VIH |
SYNIN input high threshold |
|
2.4 |
|
|
V |
|
SYNIN input low frequency range 440 kHz |
|
350 |
|
550 |
kHz |
|
SYNIN input low frequency range 2.2 MHz |
|
1800 |
|
2600 |
kHz |
SYN OUTPUT |
|
VOH |
SYN output high output voltage |
Source -16 mA, VDDA = 5 V |
2.4 |
|
|
V |
VOL |
SYN Output low level output voltage |
Sink 16 mA |
|
|
0.4 |
V |
|
Phase between HO1 and HO2 |
|
|
180 |
|
degrees |
|
Duty Cycle |
|
|
50% |
|
|
SOFT-START |
|
ISS |
Soft-start current |
|
16 |
22 |
28 |
µA |
RDS(ON) |
Soft-start pulldown resistance |
|
|
3 |
|
Ω |
THERMAL |
|
|
TSD thermal shutdown |
|
|
175 |
|
ºC |
|
Thermal shutdown hysteresis |
|
|
15 |
|
ºC |