SNVU785C February   2022  – August 2024 TPS389006-Q1

 

  1.   1
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Related Documentation
    2. 1.2 TPS389006-Q1 Applications
  4. 2Schematic, Bill of Materials, and Layout
    1. 2.1 TPS389006Q1EVM Schematic
    2. 2.2 TPS389006Q1EVM Bill of Materials
    3. 2.3 Layout and Component Placement
    4. 2.4 Layout
  5. 3EVM Connectors
    1. 3.1 EVM Test Points
    2. 3.2 EVM Jumpers
  6. 4EVM Setup and Operation
    1. 4.1 Setup and GUI Installations
      1. 4.1.1 TPS389006Q1EVM Hardware Setup
      2. 4.1.2 TPS389006Q1EVM Software Setup
    2. 4.2 Quick Start to TPS389006Q1EVM GUI
    3. 4.3 Example Operation of TPS389xxx-Q1
  7. 5Revision History

3.2 EVM Jumpers

Table 3-2 lists the jumpers on the TPS389006Q1EVM. As ordered, the EVM has thirty-five (35) jumpers installed. Figure 3-1 is provided as visual aid.

Table 3-2 List of On-board Jumpers
JUMPER JUMPER CONFIGUATION DESCRIPTION
J1 VAUX For connecting VAUX power to the EVM
J2 VDD For connecting VDD power to the EVM
J3 GND For connecting GND to the EVM
J4Shunted (default) Pin 2 to Pin 3For connecting ACT, NIRQ, and SLEEP to P1V8 or PEXT (Any external power)
J5 and J6OpenFor manually pulling down SLEEP and ACT pins to GND
J10, J11, J12, J13, J14, J15, J16, and J17J15 shuntedShunting any one of J10-J17 jumpers selects the I2C address for TPS389006-Q1 IC on the EVM
J19, J20, and J21Open For connecting to the on-board I2C buffer and pull-up voltage rail to either P1V8, PEXT or P1V2. Only shunt one of these jumpers at a time. Please remove the shunt of J22 when using one of these jumpers.
J22ShuntFor connecting to the on-board, buffer I2C and pull-up voltage rail to P3V3. During daisy-chain configuration, J22 needs to be shunted and J19, J20, and J21 needs to be open on the secondary EVMs.
J23ShuntedDisables (U5) I2C buffer
J24OpenConnects PEXT to VAUX
J26 and J29ShuntedShunting both J26 and J29 bypasses the I2C (U5) buffer for SDA and SCL signal lines
J27, J28, J30, and J31 OpenShunting these jumpers buffers SCL and SDA I2C signal lines by using the on-board (U5) buffer.
J32 and J33ShuntedShunting both J32 and J33 bypasses the I2C (U6) buffer for SDA and SCL signal lines
J34ShuntedDisables (U6) I2C buffer
J35Shunted (default) Pin 1 to Pin 2SYNC pin is pulled up to P1V8. Note if TPS389R0x-Q1 variant is used, NRST is pulled up to P1V8 when using the described jumper placement.
J36Shunted (default) Pin 2 to Pin 3Input to one of (U4) comparators to indicate the SYNC pin has tagged a voltage rail that is not in a fault condition
J37, J38, J39, J40OpenIf multiple EVMs are connected in a daisy-chain configuration, then the following EVM boards needs to have J37, J38, J39, and J40 all shunted. By shunting these jumpers, VDD, VAUX, SYNC, and NIRQ signals is provided as inputs from the primary EVM board. Also, J22 needs to be shunted and J19, J20, and J21 needs to be open on the secondary EVMs during daisy-chain configuration.
TPS389006Q1EVM TPS389006Q1EVM Jumper Locations Figure 3-1 TPS389006Q1EVM Jumper Locations