SPRACM9B June 2019 – November 2020 F29H850TU , F29H859TU-Q1 , TMS320F28384D , TMS320F28384S , TMS320F28386D , TMS320F28386S , TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1
Assuming build level 1 is completed successfully, this section verifies the overcurrent protection limits of the inverter and QEP interface running out of the CLA. In this build, the motor is run in open loop.
The motor can be connected to the HVDMC board because the PWM signals are successfully proven through the incremental build level 1.
Figure 7-1 shows the level 2 block diagram.
During the open loop tests, VqTesting, speedRef, and DC bus voltages must be adjusted carefully for PM motors so that the generated Bemf is lower than the average voltage applied to motor winding. This adjustment prevents the motor from stalling or vibrating.