4 Experimental Setup and Results

The proposed data transfer scheme based on HRCAP can be utilized for board-to-board communications across an isolation barrier and even for direct communication (without isolation). The experimental setup (shown in Figure 4) is used for validating the proposed technique, which consists of a direct single line connection between F2838x and F28004x controlCARD evaluation modules without isolation. The proposed scheme is tested for different frequencies and the performance metrics achieved with this experimental setup are measured in terms of ENOB and total transmission latency. Table 1 shows the performance metrics at different frequencies. You can refer to this table while choosing appropriate transmission PWM frequency based on your ENOB and latency requirements. The transmission latency consists of time taken by transmission PWM signal to travel to the receiver (time period) added with the time taken by decoding ISR at receiver to decode the data. Follow the directions included in the header section of the examples to add necessary watch variables to the expression window for evaluation. The snapshot of the expression windows of both transmitter and receiver CCS projects for manual data inspection mode are shown in Figure 5 and Figure 6. Also, the plot of decoded data at the receiver for ADC data transfer mode is shown in Figure 7, where the external sinusoid signal of 1 Khz is sampled at 25 Khz by transmitter and the transmission PWM frequency is 200 Khz. As the configured sampling frequency is less than the transmission frequency, the same data element is received multiple times at the receiver, which accounts for the zero slope lines in the plot.

NOTE

Table 1 shows the example results achieved with the discussed experimental setup. Introducing isolators or CMOS buffers/transceivers in the setup can provide dissimilar rise and fall times, which can need to comprehended and compensated for in the final system implementation .