SPRADH2A February   2024  – November 2024 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62P , AM62P-Q1 , DS90UB953A-Q1 , DS90UB960-Q1 , TDES960 , TSER953

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Connecting Multiple CSI-2 Cameras to the SoC
    1. 2.1 CSI-2 Aggregator Using SerDes
    2. 2.2 CSI-2 Aggregator without Using SerDes
    3. 2.3 Supported Camera Data Throughput
  6. 3Enabling Multiple Cameras in Software
    1. 3.1 Camera Subsystem Software Architecture
    2. 3.2 Image Pipeline Software Architecture
  7. 4Reference Design
    1. 4.1 Supported Cameras
    2. 4.2 Setting up Four IMX219 Cameras
    3. 4.3 Configuring Cameras and CSI-2 RX Interface
    4. 4.4 Streaming from Four Cameras
      1. 4.4.1 Streaming Camera Data to Display
      2. 4.4.2 Streaming Camera Data through Ethernet
      3. 4.4.3 Storing Camera Data to Files
    5. 4.5 Multicamera Deep Learning Inference
      1. 4.5.1 Model Selection
      2. 4.5.2 Pipeline Setup
  8. 5Performance Analysis
  9. 6Summary
  10. 7References
  11. 8Revision History

2 Connecting Multiple CSI-2 Cameras to the SoC

The Camera Subsystem on the AM6x SoC contains the following components, as shown in Figure 2-1:

  • MIPI D-PHY Receiver: receives video streams from external cameras, supporting up to 1.5 Gbps per data lane for 4 lanes.
  • CSI-2 Receiver (RX): receives video streams from the D-PHY receiver and either directly sends the streams to the ISP or dumps the data to DDR memory. This module supports up to 16 virtual channels.
  • SHIM: a DMA wrapper that enables sending the captured streams to memory over DMA. Multiple DMA contexts can be created by this wrapper, with each context corresponding to a virtual channel of the CSI-2 Receiver.

High-Level Block Diagram of the Camera Subsystem on AM62A/AM62P SoCFigure 2-1 High-Level Block Diagram of the Camera Subsystem on AM62A/AM62P SoC

Multiple cameras (same or different) can be supported on the AM6x through the use of virtual channels of CSI-2 RX, even though there is only one CSI-2 RX interface on the SoC. An external CSI-2 aggregating component is needed to combine multiple camera streams and send to a single SoC. There are two types of CSI-2 aggregating designs that can be used and are described in the following sections.