SPRADJ1A June   2024  – August 2024 TMS320F280021 , TMS320F280023 , TMS320F280023C , TMS320F280025 , TMS320F280025C , TMS320F280033 , TMS320F280034 , TMS320F280037 , TMS320F280037C , TMS320F280039 , TMS320F280039C , TMS320F280041 , TMS320F280041C , TMS320F280045 , TMS320F280049 , TMS320F280049C , TMS320F28075 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377S , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379S , TMS320F28P550SJ , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2HHC LLC Control Architecture and Logic Diagram
    1. 2.1 CMPSS
    2. 2.2 EPWM
    3. 2.3 Configurable Logic Block (CLB)
  6. 3C2000 Configurations in HHC LLC
    1. 3.1 CMPSS Configurations
    2. 3.2 EPWM Configurations
    3. 3.3 CLB Configurations
  7. 4System Control Method
    1. 4.1 Soft Start
    2. 4.2 Burst Mode Control
    3. 4.3 Minimum and Maximum Frequency Clamping
  8. 5Resonant Capacitor Voltage Sensing Design
  9. 6Summary
  10. 7References
  11. 8Revision History

4.3 Minimum and Maximum Frequency Clamping

For LLC converters, to avoid the capacitive region (ZCS region) operation, which might cause MOSFET damaged due to the body diode reverse recovery, it is required to limit the minimum switching frequency according to the power stage parameters. Thus, in addition to the configurations in Chapter 3.2, another AQ module setting is induced, to clear low EPWM1A at the CTR=CMPA event, where CMPA value refers to the maximum switching period/2. In this way, the minimum switching frequency can be automatically clamped if the comparator event has not yet occurred.

In addition, to clamp the maximum switching frequency at the same time, it is possible to enable the blanking window for DCxEVT event (from CMPSS), so that if any comparator events occur within the blanking window, it can only take effect to clear low the PWM signal after the blanking window expires. Thus,

the duration of the blanking window refers to the minimum switching period/2, which starts from CTR= 0 pulse.