SPRUHM8K December 2013 – May 2024 TMS320F28374D , TMS320F28375D , TMS320F28376D , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28378D , TMS320F28379D , TMS320F28379D-Q1
The USB NAK limit 8-bit read-only register (USBNAKLMT) sets the number of frames after which endpoint 0 should time out on receiving a stream of NAK responses. (Equivalent settings for other endpoints can be made through their USBTXINTERVAL[n] and USBRXINTERVAL[n] registers.)
The number of frames selected is 2(m-1) (where m is the value set in the register, with valid values of 2–16). If the Host receives NAK responses from the target for more frames than the number represented by the limit set in this register, the endpoint is halted.
Note: A value of 0 or 1 disables the NAK timeout function.
Mode(s): | Host |
USBNAKLMT is shown in Figure 23-39 and described in Table 23-41.
7 | 5 | 4 | 0 |
Reserved | NAKLMT |
R-0 | R/W-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Value | Description |
---|---|---|---|
7-5 | Reserved | 0 | Reserved |
4-0 | NAKLMT | 0 | EP0 NAK Limit specifies the number of frames after receiving a stream of NAK responses. |