The USB transmit FIFO start address 16-bit register (USBTXFIFOADD) controls the start address of the selected transmit endpoint FIFOs.
USBTXFIFOADDR is shown in Figure 22-22 and described in Table 22-24.
Figure 22-22 USB Transmit FIFO Start Address Register (USBTXFIFOADDR])
LEGEND: R/W = Read/Write; R = Read only; -n =
value after reset |
Table 22-24 USB Transmit FIFO Start Address Register (USBTXFIFOADDR) Field DescriptionsBit | Field | Value | Description |
---|
15-9 | Reserved | 0 | Reserved |
8-0 | ADDR | | Start Address of the endpoint FIFO in units of 8 bytes. |
0h | 0 |
1h | 8 |
2h | 16 |
3h | 24 |
4h | 32 |
5h | 40 |
6h | 48 |
7h | 56 |
8h | 64 |
.. | .. |
1FFh | 4095 |